/** @file
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Sata policy
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _SATA_CONFIG_H_
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#define _SATA_CONFIG_H_
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#include <PchLimits.h>
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#define SATA_CONFIG_REVISION 1
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extern EFI_GUID gSataConfigGuid;
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#pragma pack (push,1)
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typedef enum {
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SataModeAhci,
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SataModeRaid,
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SataModeMax
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} SATA_MODE;
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typedef enum {
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SataSpeedDefault,
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SataSpeedGen1,
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SataSpeedGen2,
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SataSpeedGen3
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} SATA_SPEED;
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typedef enum {
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SataRstMsix,
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SataRstMsi,
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SataRstLegacy
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} SATA_RST_INTERRUPT;
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typedef enum {
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SataRaidClient,
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SataRaidAlternate,
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SataRaidServer
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} SATA_RAID_DEV_ID;
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/**
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This structure configures the features, property, and capability for each SATA port.
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**/
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typedef struct {
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/**
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Enable SATA port.
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It is highly recommended to disable unused ports for power savings
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**/
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UINT32 Enable : 1; ///< 0: Disable; <b>1: Enable</b>
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UINT32 HotPlug : 1; ///< <b>0: Disable</b>; 1: Enable
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UINT32 InterlockSw : 1; ///< <b>0: Disable</b>; 1: Enable
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UINT32 External : 1; ///< <b>0: Disable</b>; 1: Enable
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UINT32 SpinUp : 1; ///< <b>0: Disable</b>; 1: Enable the COMRESET initialization Sequence to the device
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UINT32 SolidStateDrive : 1; ///< <b>0: HDD</b>; 1: SSD
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UINT32 DevSlp : 1; ///< <b>0: Disable</b>; 1: Enable DEVSLP on the port
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UINT32 EnableDitoConfig : 1; ///< <b>0: Disable</b>; 1: Enable DEVSLP Idle Timeout settings (DmVal, DitoVal)
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UINT32 DmVal : 4; ///< DITO multiplier. Default is <b>15</b>.
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UINT32 DitoVal : 10; ///< DEVSLP Idle Timeout (DITO), Default is <b>625</b>.
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/**
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Support zero power ODD <b>0: Disable</b>, 1: Enable.
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This is also used to disable ModPHY dynamic power gate.
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**/
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UINT32 ZpOdd : 1;
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UINT32 DevSlpResetConfig : 4; ///< 0: Hardware default; <b>0x01: GpioResumeReset</b>; 0x03: GpioHostDeepReset; 0x05: GpioPlatformReset; 0x07: GpioDswReset
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UINT32 SataPmPtm : 1; ///< Deprecated
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UINT32 RxPolarity : 1; ///< <b>0: Disable</b>; 1: Enable; Rx Polarity
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UINT32 RsvdBits0 : 3; ///< Reserved fields for future expansion w/o protocol change
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} PCH_SATA_PORT_CONFIG;
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/**
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This structure lists PCH supported SATA thermal throttling register setting for customization.
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The settings is programmed through SATA Index/Data registers.
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When the SuggestedSetting is enabled, the customized values are ignored.
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**/
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typedef struct {
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UINT32 P0T1M : 2; ///< Port 0 T1 Multipler
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UINT32 P0T2M : 2; ///< Port 0 T2 Multipler
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UINT32 P0T3M : 2; ///< Port 0 T3 Multipler
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UINT32 P0TDisp : 2; ///< Port 0 Tdispatch
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UINT32 P1T1M : 2; ///< Port 1 T1 Multipler
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UINT32 P1T2M : 2; ///< Port 1 T2 Multipler
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UINT32 P1T3M : 2; ///< Port 1 T3 Multipler
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UINT32 P1TDisp : 2; ///< Port 1 Tdispatch
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UINT32 P0Tinact : 2; ///< Port 0 Tinactive
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UINT32 P0TDispFinit : 1; ///< Port 0 Alternate Fast Init Tdispatch
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UINT32 P1Tinact : 2; ///< Port 1 Tinactive
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UINT32 P1TDispFinit : 1; ///< Port 1 Alternate Fast Init Tdispatch
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UINT32 SuggestedSetting : 1; ///< 0: Disable; <b>1: Enable</b> suggested representative values
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UINT32 RsvdBits0 : 9; ///< Reserved bits
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} SATA_THERMAL_THROTTLING;
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/**
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The SATA_CONFIG block describes the expected configuration of the SATA controllers.
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<b>Revision 1</b>:
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- Initial version.
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Config Block Header
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///
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/// This member describes whether or not the SATA controllers should be enabled. 0: Disable; <b>1: Enable</b>.
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///
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UINT8 Enable;
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UINT8 TestMode; ///< <b>(Test)</b> <b>0: Disable</b>; 1: Allow entrance to the PCH SATA test modes
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UINT8 SalpSupport; ///< 0: Disable; <b>1: Enable</b> Aggressive Link Power Management
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UINT8 PwrOptEnable; ///< 0: Disable; <b>1: Enable</b> SATA Power Optimizer on PCH side.
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/**
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EsataSpeedLimit
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When enabled, BIOS will configure the PxSCTL.SPD to 2 to limit the eSATA port speed.
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Please be noted, this setting could be cleared by HBA reset, which might be issued
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by EFI AHCI driver when POST time, or by SATA inbox driver/RST driver after POST.
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To support the Speed Limitation when POST, the EFI AHCI driver should preserve the
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setting before and after initialization. For support it after POST, it's dependent on
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driver's behavior.
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<b>0: Disable</b>; 1: Enable
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**/
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UINT8 EsataSpeedLimit;
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UINT8 LedEnable; ///< SATA LED indicates SATA controller activity. 0: Disable; <b>1: Enable</b> SATA LED.
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/**
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This option allows to configure SATA controller device ID while in RAID mode.
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Refer to SATA_RAID_DEV_ID enumeration for supported options.
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Choosing Client will allow RST driver loading, RSTe driver will not be able to load
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Choosing Alternate will not allow RST inbox driver loading in Windows
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Choosing Server will allow RSTe driver loading, RST driver will not load
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<b>0: Client</b>; 1: Alternate; 2: Server
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**/
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UINT8 RaidDeviceId;
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/**
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Controlls which interrupts will be linked to SATA controller CAP list
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This option will take effect only if SATA controller is in RAID mode
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Default: <b>PchSataMsix</b>
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**/
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UINT8 SataRstInterrupt;
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/**
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Determines the system will be configured to which SATA mode.
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Refer to SATA_MODE enumeration for supported options. Default is <b>SataModeAhci</b>.
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**/
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UINT8 SataMode;
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/**
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Indicates the maximum speed the SATA controller can support.
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Refer to SATA_SPEED enumeration for supported options.
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<b>0h: SataSpeedDefault</b>; 1h: 1.5 Gb/s (Gen 1); 2h: 3 Gb/s(Gen 2); 3h: 6 Gb/s (Gen 1)
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**/
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UINT8 SpeedLimit;
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UINT8 EnclosureSupport; ///< Enclosure Management Support. 0: Disable; 1: Enable
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/**
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Controlls whenever Serial GPIO support is enabled for controller
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<b>0: Disable</b>; 1: Enable
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**/
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UINT8 SgpioSupport;
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/**
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This member configures the features, property, and capability for each SATA port.
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**/
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PCH_SATA_PORT_CONFIG PortSettings[PCH_MAX_SATA_PORTS];
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/**
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This field decides the settings of Sata thermal throttling. When the Suggested Setting
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is enabled, PCH RC will use the suggested representative values.
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**/
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SATA_THERMAL_THROTTLING ThermalThrottling;
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} SATA_CONFIG;
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#pragma pack (pop)
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#endif // _SATA_CONFIG_H_
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