/** @file
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ADR policy
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _ADR_CONFIG_H_
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#define _ADR_CONFIG_H_
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#include <ConfigBlock.h>
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#define ADR_CONFIG_REVISION 1
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extern EFI_GUID gAdrConfigGuid;
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#pragma pack (push,1)
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typedef enum {
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AdrScale1us,
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AdrScale10us,
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AdrScale100us,
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AdrScale1ms,
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AdrScale10ms,
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AdrScale100ms,
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AdrScale1s,
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AdrScale10s
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} ADR_TIMER_SCALE;
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/**
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ADR Source Enable
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**/
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typedef union {
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struct {
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UINT32 Reserved1 : 1;
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UINT32 AdrSrcPbo : 1;
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UINT32 AdrSrcPmcUncErr : 1;
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UINT32 AdrSrcPchThrm : 1;
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UINT32 AdrSrcMePbo : 1;
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UINT32 AdrSrcCpuThrm : 1;
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UINT32 AdrSrcMegbl : 1;
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UINT32 AdrSrcLtReset : 1;
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UINT32 AdrSrcPmcWdt : 1;
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UINT32 AdrSrcMeWdt : 1;
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UINT32 AdrSrcPmcFw : 1;
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UINT32 AdrSrcPchpwrFlr : 1;
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UINT32 AdrSrcSyspwrFlr : 1;
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UINT32 Reserved2 : 1;
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UINT32 AdrSrcMiaUxsErr : 1;
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UINT32 AdrSrcMiaUxErr : 1;
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UINT32 AdrSrcCpuThrmWdt : 1;
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UINT32 AdrSrcMeUncErr : 1;
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UINT32 AdrSrcAdrGpio : 1;
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UINT32 AdrSrcOcwdtNoicc : 1;
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UINT32 AdrSrcOcwdtIcc : 1;
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UINT32 AdrSrcCseHecUncErr : 1;
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UINT32 AdrSrcPmcSramUncErr : 1;
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UINT32 AdrSrcPmcIromParity : 1;
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UINT32 AdrSrcPmcRfFusaErr : 1;
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UINT32 Reserved3 : 4;
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UINT32 AdrSrcPpbrParityErr : 1;
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UINT32 Reserved4 : 2;
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} Field;
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UINT32 Value;
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} ADR_SOURCE_ENABLE;
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/**
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ADR Configuration
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<b>Revision 1</b>: - Initial version.
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Config Block Header
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UINT32 AdrEn : 2; ///< Determine if Adr is enabled - 0: PLATFORM_POR, 1: FORCE_ENABLE, 2: FORCE_DISABLE
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UINT32 AdrTimerEn : 2; ///< Determine if Adr timer options are enabled - 0: PLATFORM_POR, 1: FORCE_ENABLE, 2: FORCE_DISABLE
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UINT32 AdrTimer1Val : 2; ///< Determines the Timeout value used for the ADR timer 1. A value of zero bypasses the timer
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UINT32 AdrMultiplier1Val : 8; ///< Specifies the tick frequency upon which the timer 1 will increment. ADR_TIMER_SCALE should be used to encode values
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UINT32 AdrTimer2Val : 8; ///< Determines the Timeout value used for the ADR timer 2. A value of zero bypasses the timer
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UINT32 AdrMultiplier2Val : 8; ///< Specifies the tick frequency upon which the timer 2 will increment. ADR_TIMER_SCALE should be used to encode values
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UINT32 AdrHostPartitionReset : 2; ///< Determine if Host Partition Reset is enabled - 0: PLATFORM_POR, 1: FORCE_ENABLE, 2: FORCE_DISABLE
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UINT32 AdrSrcOverride : 1; ///< Check if default ADR sources will be overriten with custom 0: Not overwritten, 1: Overwritten
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UINT32 ReservedBits : 31;
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ADR_SOURCE_ENABLE AdrSrcSel; ///< Determine which ADR sources are enabled - 0: Enabled, 1: Disabled
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} ADR_CONFIG;
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#pragma pack (pop)
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#endif // _ADR_CONFIG_H_
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