/** @file
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Dci policy
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _DCI_CONFIG_H_
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#define _DCI_CONFIG_H_
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#define DCI_PREMEM_CONFIG_REVISION 2
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extern EFI_GUID gDciPreMemConfigGuid;
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#pragma pack (push,1)
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typedef enum {
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DciDbcDisabled = 0x0,
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DciDbcUsb2 = 0x1,
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DciDbcUsb3 = 0x2,
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DciDbcBoth = 0x3,
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DciDbcNoChange = 0x4,
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DciDbcMax
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} DCI_DBC_MODE;
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typedef enum {
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Usb3TcDbgDisabled = 0x0,
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Usb3TcDbgEnabled = 0x1,
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Usb3TcDbgNoChange = 0x2,
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Usb3TcDbgMax
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} DCI_USB3_TYPE_C_DEBUG_MODE;
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/**
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The PCH_DCI_PREMEM_CONFIG block describes policies related to Direct Connection Interface (DCI)
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<b>Revision 1</b>:
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- Initial version.
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<b>Revision 2</b>:
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- Added DciModphyPg
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- change to use data in byte unit rather than bit-field
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Config Block Header
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/**
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DCI enable.
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Determine if to enable DCI debug from host.
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<b>0:Disabled</b>; 1:Enabled
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**/
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UINT8 DciEn;
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/**
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USB DbC enable mode.
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Disabled: Clear both USB2/3DBCEN; USB2: Set USB2DBCEN; USB3: Set USB3DBCEN; Both: Set both USB2/3DBCEN; No Change: Comply with HW value
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Refer to definition of DCI_USB_DBC_MODE for supported settings.
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0:Disabled; 1:USB2; 2:USB3; 3:Both; <b>4:No Change</b>
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**/
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UINT8 DciDbcMode;
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/**
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Enable Modphy power gate when DCI is enable. It must be disabled for 4-wire DCI OOB. Set default to HW default : Disabled
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<b>0:Disabled</b>; 1:Enabled
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**/
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UINT8 DciModphyPg;
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/**
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USB3 Type-C UFP2DFP kenel / platform debug support. No change will do nothing to UFP2DFP configuration.
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When enabled, USB3 Type C UFP (upstream-facing port) may switch to DFP (downstream-facing port) for first connection.
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It must be enabled for USB3 kernel(kernel mode debug) and platform debug(DFx, DMA, Trace) over UFP Type-C receptacle.
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Refer to definition of DCI_USB_TYPE_C_DEBUG_MODE for supported settings.
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0:Disabled; 1:Enabled; <b>2:No Change</b>
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**/
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UINT8 DciUsb3TypecUfpDbg;
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} PCH_DCI_PREMEM_CONFIG;
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#pragma pack (pop)
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#endif // _DCI_CONFIG_H_
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