/** @file
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Implementation of Usb Controller PPI.
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Copyright (c) 2013-2015 Intel Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiPei.h>
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#include <Ppi/UsbController.h>
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#include <Library/DebugLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/PcdLib.h>
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#include <Library/PciLib.h>
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#include <Library/IoLib.h>
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#include "UsbPei.h"
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//
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// Globals
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//
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//
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EFI_PEI_PPI_DESCRIPTOR mPpiList = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gPeiUsbControllerPpiGuid,
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NULL
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};
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UINTN mIohOhciPciReg[IOH_MAX_OHCI_USB_CONTROLLERS] = {
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PCI_LIB_ADDRESS (IOH_USB_BUS_NUMBER, IOH_USB_OHCI_DEVICE_NUMBER, IOH_OHCI_FUNCTION_NUMBER, 0)
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};
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UINTN mIohEhciPciReg[IOH_MAX_EHCI_USB_CONTROLLERS] = {
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PCI_LIB_ADDRESS (IOH_USB_BUS_NUMBER, IOH_USB_EHCI_DEVICE_NUMBER, IOH_EHCI_FUNCTION_NUMBER, 0),
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};
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/**
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When EHCI get started in DXE, OHCI couldn't get the ownership
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of roothub after warm reset because CF@EHCI hasn't been cleared.
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We should clear that reg before UpdateBootMode. But Reg@EHCI is
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memory-mapped, so need assume a range of space without conflict
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in PCI memory space.
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@param[in] PeiServices The pointer of EFI_PEI_SERVICES
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**/
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VOID
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SwitchConfigFlag (
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IN EFI_PEI_SERVICES **PeiServices
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)
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{
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UINT32 SavBaseAddr;
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UINT32 UsbBaseAddr;
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UINT16 SaveCmdData;
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UINT8 EhciCapLen;
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UINT8 Index;
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UsbBaseAddr = 0;
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for (Index = 0; Index < IOH_MAX_EHCI_USB_CONTROLLERS; Index++) {
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UsbBaseAddr = PcdGet32(PcdPeiQNCUsbControllerMemoryBaseAddress);
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//
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// Manage EHCI on IOH, set UsbBaseAddr
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//
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SavBaseAddr = PciRead32 (mIohEhciPciReg[Index] | R_IOH_USB_MEMBAR);
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PciWrite32 (mIohEhciPciReg[Index] | R_IOH_USB_MEMBAR, UsbBaseAddr);
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//
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// Save Cmd register
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//
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SaveCmdData = PciRead16 (mIohEhciPciReg[Index] | R_IOH_USB_COMMAND);
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//
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// Enable EHCI on IOH
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//
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PciOr16 (mIohEhciPciReg[Index] | R_IOH_USB_COMMAND, B_IOH_USB_COMMAND_BME | B_IOH_USB_COMMAND_MSE );
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//
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// Clear CF register on EHCI
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//
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EhciCapLen = MmioRead8 (UsbBaseAddr + R_IOH_EHCI_CAPLENGTH);
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MmioWrite32 (UsbBaseAddr + EhciCapLen + R_IOH_EHCI_CONFIGFLAGS, 0);
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DEBUG ((EFI_D_INFO, "CF@EHCI = %x \n", UsbBaseAddr + EhciCapLen + R_IOH_EHCI_CONFIGFLAGS));
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//
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// Restore EHCI UsbBaseAddr in PCI space
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//
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PciWrite32 (mIohEhciPciReg[Index] | R_IOH_USB_MEMBAR, SavBaseAddr);
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//
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// Restore EHCI Command register in PCI space
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//
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PciWrite16(mIohEhciPciReg[Index] | R_IOH_USB_COMMAND, SaveCmdData);
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}
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}
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/**
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Retrieved specified the USB controller information.
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@param PeiServices The pointer of EFI_PEI_SERVICES.
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@param This This PEI_USB_CONTROLLER_PPI instance.
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@param UsbControllerId Indicate which usb controller information will be retrieved.
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@param ControllerType Indicate the controller is Ehci, Ohci, OHCI
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@param BaseAddress Indicate the memory bar of the controller
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@retval EFI_SUCCESS The reset operation succeeded.
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@retval EFI_INVALID_PARAMETER Attributes is not valid.
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**/
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EFI_STATUS
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GetOhciController (
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_USB_CONTROLLER_PPI *This,
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IN UINT8 UsbControllerId,
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IN UINTN *ControllerType,
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IN UINTN *BaseAddress
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)
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{
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IOH_OHCI_DEVICE *PeiIohOhciDev;
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PeiIohOhciDev = IOH_OHCI_DEVICE_FROM_THIS (This);
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if (UsbControllerId >= IOH_MAX_OHCI_USB_CONTROLLERS) {
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return EFI_INVALID_PARAMETER;
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}
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*ControllerType = PEI_OHCI_CONTROLLER;
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*BaseAddress = PeiIohOhciDev->MmioBase[UsbControllerId];
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return EFI_SUCCESS;
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}
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/**
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Retrieved specified the USB controller information.
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@param PeiServices The pointer of EFI_PEI_SERVICES.
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@param This This PEI_USB_CONTROLLER_PPI instance.
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@param UsbControllerId Indicate which usb controller information will be retrieved.
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@param ControllerType Indicate the controller is Ehci, Ohci, OHCI
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@param BaseAddress Indicate the memory bar of the controller
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@retval EFI_SUCCESS The reset operation succeeded.
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@retval EFI_INVALID_PARAMETER Attributes is not valid.
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**/
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EFI_STATUS
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GetEhciController (
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_USB_CONTROLLER_PPI *This,
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IN UINT8 UsbControllerId,
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IN UINTN *ControllerType,
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IN UINTN *BaseAddress
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)
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{
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IOH_EHCI_DEVICE *PeiIohEhciDev;
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PeiIohEhciDev = IOH_EHCI_DEVICE_FROM_THIS (This);
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if (UsbControllerId >= IOH_MAX_EHCI_USB_CONTROLLERS) {
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return EFI_INVALID_PARAMETER;
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}
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*ControllerType = PEI_EHCI_CONTROLLER;
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*BaseAddress = PeiIohEhciDev->MmioBase[UsbControllerId];
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return EFI_SUCCESS;
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}
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/**
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Retrieved specified the USB controller information.
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@param IohOhciPciReg Ohci device address list.
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@param OhciCount The count of the OHCI
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@param IohEhciPciReg Ehci device address list.
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@param EhciCount The count of the EHCI
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**/
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VOID
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EnableBusMaster (
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IN UINTN IohOhciPciReg[],
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IN UINT8 OhciCount,
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IN UINTN IohEhciPciReg[],
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IN UINT8 EhciCount
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)
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{
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UINT8 Index;
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UINT16 CmdReg;
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for (Index = 0; Index < OhciCount; Index ++) {
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CmdReg = PciRead16 (IohOhciPciReg[Index] | R_IOH_USB_COMMAND);
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CmdReg = (UINT16) (CmdReg | B_IOH_USB_COMMAND_BME );
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PciWrite16 (IohOhciPciReg[Index] | R_IOH_USB_COMMAND, CmdReg);
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}
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for (Index = 0; Index < EhciCount; Index ++) {
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CmdReg = PciRead16 (IohEhciPciReg[Index] | R_IOH_USB_COMMAND);
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CmdReg = (UINT16) (CmdReg | B_IOH_USB_COMMAND_BME );
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PciWrite16 (IohEhciPciReg[Index] | R_IOH_USB_COMMAND, CmdReg);
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}
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}
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PEI_USB_CONTROLLER_PPI mUsbControllerPpi[2] = { {GetOhciController}, {GetEhciController}};
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/**
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@param FileHandle Handle of the file being invoked.
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@param PeiServices Describes the list of possible PEI Services.
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@retval EFI_SUCCESS PPI successfully installed
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**/
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EFI_STATUS
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PeimInitializeIchUsb (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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EFI_STATUS Status;
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UINTN i;
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EFI_PHYSICAL_ADDRESS AllocateAddress;
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IOH_OHCI_DEVICE *PeiIohOhciDev;
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IOH_EHCI_DEVICE *PeiIohEhciDev;
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UINT16 CmdReg;
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Status = PeiServicesAllocatePages (
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EfiBootServicesCode,
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1,
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&AllocateAddress
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);
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ASSERT_EFI_ERROR (Status);
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EnableBusMaster (
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mIohOhciPciReg,
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IOH_MAX_OHCI_USB_CONTROLLERS,
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mIohEhciPciReg,
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IOH_MAX_EHCI_USB_CONTROLLERS
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);
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if (FeaturePcdGet (PcdEhciRecoveryEnabled)) {
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DEBUG ((EFI_D_INFO, "UsbPei:EHCI is used for recovery\n"));
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//
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// EHCI recovery is enabled
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//
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PeiIohEhciDev = (IOH_EHCI_DEVICE *)((UINTN)AllocateAddress);
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ZeroMem (PeiIohEhciDev, sizeof(IOH_EHCI_DEVICE));
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PeiIohEhciDev->Signature = PEI_IOH_EHCI_SIGNATURE;
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CopyMem(&(PeiIohEhciDev->UsbControllerPpi), &mUsbControllerPpi[1], sizeof(PEI_USB_CONTROLLER_PPI));
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CopyMem(&(PeiIohEhciDev->PpiList), &mPpiList, sizeof(mPpiList));
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PeiIohEhciDev->PpiList.Ppi = &PeiIohEhciDev->UsbControllerPpi;
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//
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// Assign resources and enable Ehci controllers
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//
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for (i = 0; i < IOH_MAX_EHCI_USB_CONTROLLERS; i++) {
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DEBUG ((EFI_D_INFO, "UsbPei:Enable the %dth EHCI controller for recovery\n", i));
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PeiIohEhciDev->MmioBase[i] = PcdGet32(PcdPeiQNCUsbControllerMemoryBaseAddress) + IOH_USB_CONTROLLER_MMIO_RANGE * i;
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//
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// Assign base address register, Enable Bus Master and Memory Io
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//
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PciWrite32 (mIohEhciPciReg[i] | R_IOH_USB_MEMBAR, PeiIohEhciDev->MmioBase[i]);
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CmdReg = PciRead16 (mIohEhciPciReg[i] | R_IOH_USB_COMMAND);
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CmdReg = (UINT16) (CmdReg | B_IOH_USB_COMMAND_MSE | B_IOH_USB_COMMAND_BME );
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PciWrite16 (mIohEhciPciReg[i] | R_IOH_USB_COMMAND, CmdReg);
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}
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//
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// Install USB Controller PPI
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//
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Status = (**PeiServices).InstallPpi (
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PeiServices,
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&PeiIohEhciDev->PpiList
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);
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ASSERT_EFI_ERROR (Status);
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} else {
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DEBUG ((EFI_D_INFO, "UsbPei:OHCI is used for recovery\n"));
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//
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// OHCI recovery is enabled
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//
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SwitchConfigFlag ((EFI_PEI_SERVICES**)PeiServices);
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PeiIohOhciDev = (IOH_OHCI_DEVICE *)((UINTN)AllocateAddress);
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ZeroMem (PeiIohOhciDev, sizeof(IOH_OHCI_DEVICE));
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PeiIohOhciDev->Signature = PEI_IOH_OHCI_SIGNATURE;
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CopyMem(&(PeiIohOhciDev->UsbControllerPpi), &mUsbControllerPpi[0], sizeof(PEI_USB_CONTROLLER_PPI));
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CopyMem(&(PeiIohOhciDev->PpiList), &mPpiList, sizeof(mPpiList));
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PeiIohOhciDev->PpiList.Ppi = &PeiIohOhciDev->UsbControllerPpi;
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//
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// Assign resources and enable OHCI controllers
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//
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for (i = 0; i < IOH_MAX_OHCI_USB_CONTROLLERS; i++) {
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DEBUG ((EFI_D_INFO, "UsbPei:Enable the %dth OHCI controller for recovery\n", i));
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PeiIohOhciDev->MmioBase[i] = PcdGet32(PcdPeiQNCUsbControllerMemoryBaseAddress) + IOH_USB_CONTROLLER_MMIO_RANGE * i;
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//
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// Assign base address register, Enable Bus Master and Memory Io
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//
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PciWrite32 (mIohOhciPciReg[i] | R_IOH_USB_MEMBAR, PeiIohOhciDev->MmioBase[i]);
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Status = PeiServicesAllocatePages (
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EfiBootServicesCode,
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1,
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&AllocateAddress
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);
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ASSERT_EFI_ERROR (Status);
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MmioWrite32(PeiIohOhciDev->MmioBase[i] + R_IOH_USB_OHCI_HCCABAR, (UINT32)AllocateAddress);
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CmdReg = PciRead16 (mIohOhciPciReg[i] | R_IOH_USB_COMMAND);
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CmdReg = (UINT16) (CmdReg | B_IOH_USB_COMMAND_MSE | B_IOH_USB_COMMAND_BME );
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PciWrite16 (mIohOhciPciReg[i] | R_IOH_USB_COMMAND, CmdReg);
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}
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//
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// Install USB Controller PPI
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//
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Status = (**PeiServices).InstallPpi (
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PeiServices,
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&PeiIohOhciDev->PpiList
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);
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ASSERT_EFI_ERROR (Status);
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}
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return Status;
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}
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