/** @file
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PCH SPI Runtime Driver implements the SPI Host Controller Compatibility Interface.
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Copyright (c) 2013-2015 Intel Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "PchSpi.h"
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extern EFI_GUID gEfiEventVirtualAddressChangeGuid;
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//
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// Global variables
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//
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SPI_INSTANCE *mSpiInstance;
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CONST UINT32 mSpiRegister[] = {
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R_QNC_RCRB_SPIS,
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R_QNC_RCRB_SPIPREOP,
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R_QNC_RCRB_SPIOPMENU,
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R_QNC_RCRB_SPIOPMENU + 4
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};
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//
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// Function implementations
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//
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VOID
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PchSpiVirtualddressChangeEvent (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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/*++
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Routine Description:
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Fixup internal data pointers so that the services can be called in virtual mode.
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Arguments:
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Event The event registered.
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Context Event context. Not used in this event handler.
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Returns:
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None.
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--*/
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{
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gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mSpiInstance->PchRootComplexBar));
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gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mSpiInstance->SpiProtocol.Init));
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gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mSpiInstance->SpiProtocol.Lock));
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gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mSpiInstance->SpiProtocol.Execute));
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gRT->ConvertPointer (EFI_INTERNAL_POINTER, (VOID *) &(mSpiInstance));
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}
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EFI_STATUS
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EFIAPI
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InstallPchSpi (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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/*++
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Routine Description:
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Entry point for the SPI host controller driver.
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Arguments:
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ImageHandle Image handle of this driver.
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SystemTable Global system service table.
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Returns:
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EFI_SUCCESS Initialization complete.
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EFI_UNSUPPORTED The chipset is unsupported by this driver.
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EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
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EFI_DEVICE_ERROR Device error, driver exits abnormally.
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--*/
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{
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EFI_STATUS Status;
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UINT64 BaseAddress;
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UINT64 Length;
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EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdMemorySpaceDescriptor;
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UINT64 Attributes;
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EFI_EVENT Event;
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DEBUG ((DEBUG_INFO, "InstallPchSpi() Start\n"));
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//
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// Allocate Runtime memory for the SPI protocol instance.
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//
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mSpiInstance = AllocateRuntimeZeroPool (sizeof (SPI_INSTANCE));
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if (mSpiInstance == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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//
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// Initialize the SPI protocol instance
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//
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Status = SpiProtocolConstructor (mSpiInstance);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Install the EFI_SPI_PROTOCOL interface
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//
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Status = gBS->InstallMultipleProtocolInterfaces (
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&(mSpiInstance->Handle),
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&gEfiSpiProtocolGuid,
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&(mSpiInstance->SpiProtocol),
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NULL
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);
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if (EFI_ERROR (Status)) {
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FreePool (mSpiInstance);
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return EFI_DEVICE_ERROR;
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}
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//
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// Set RCBA space in GCD to be RUNTIME so that the range will be supported in
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// virtual address mode in EFI aware OS runtime.
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// It will assert if RCBA Memory Space is not allocated
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// The caller is responsible for the existence and allocation of the RCBA Memory Spaces
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//
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BaseAddress = (EFI_PHYSICAL_ADDRESS) (mSpiInstance->PchRootComplexBar);
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Length = PcdGet64 (PcdRcbaMmioSize);
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Status = gDS->GetMemorySpaceDescriptor (BaseAddress, &GcdMemorySpaceDescriptor);
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ASSERT_EFI_ERROR (Status);
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Attributes = GcdMemorySpaceDescriptor.Attributes | EFI_MEMORY_RUNTIME;
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Status = gDS->AddMemorySpace (
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EfiGcdMemoryTypeMemoryMappedIo,
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BaseAddress,
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Length,
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EFI_MEMORY_RUNTIME | EFI_MEMORY_UC
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);
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ASSERT_EFI_ERROR(Status);
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Status = gDS->SetMemorySpaceAttributes (
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BaseAddress,
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Length,
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Attributes
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);
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ASSERT_EFI_ERROR (Status);
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Status = gBS->CreateEventEx (
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EVT_NOTIFY_SIGNAL,
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TPL_NOTIFY,
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PchSpiVirtualddressChangeEvent,
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NULL,
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&gEfiEventVirtualAddressChangeGuid,
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&Event
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);
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ASSERT_EFI_ERROR (Status);
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DEBUG ((DEBUG_INFO, "InstallPchSpi() End\n"));
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return EFI_SUCCESS;
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}
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VOID
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EFIAPI
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SpiPhaseInit (
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VOID
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)
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/*++
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Routine Description:
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This function is a a hook for Spi Dxe phase specific initialization
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Arguments:
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None
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Returns:
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None
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--*/
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{
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UINTN Index;
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//
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// Disable SMM BIOS write protect if it's not a SMM protocol
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//
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MmioAnd8 (
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PciDeviceMmBase (PCI_BUS_NUMBER_QNC,
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PCI_DEVICE_NUMBER_QNC_LPC,
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PCI_FUNCTION_NUMBER_QNC_LPC) + R_QNC_LPC_BIOS_CNTL,
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(UINT8) (~B_QNC_LPC_BIOS_CNTL_SMM_BWP)
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);
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//
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// Save SPI Registers for S3 resume usage
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//
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for (Index = 0; Index < sizeof (mSpiRegister) / sizeof (UINT32); Index++) {
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S3BootScriptSaveMemWrite (
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S3BootScriptWidthUint32,
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(UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index]),
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1,
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(VOID *) (UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index])
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);
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}
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}
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