/** @file
|
|
Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
|
SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
**/
|
|
#ifndef PCH_PCIE_DEVICE_TABLE_H_
|
#define PCH_PCIE_DEVICE_TABLE_H_
|
|
|
//
|
// PCIe device table PPI GUID.
|
//
|
extern EFI_GUID gPchPcieDeviceTablePpiGuid;
|
|
typedef enum {
|
PchPcieOverrideDisabled = 0,
|
PchPcieL1L2Override = 0x01,
|
PchPcieL1SubstatesOverride = 0x02,
|
PchPcieL1L2AndL1SubstatesOverride = 0x03,
|
PchPcieLtrOverride = 0x04
|
} PCH_PCIE_OVERRIDE_CONFIG;
|
|
/**
|
PCIe device table entry entry
|
|
The PCIe device table is being used to override PCIe device ASPM settings.
|
To take effect table consisting of such entries must be instelled as PPI
|
on gPchPcieDeviceTablePpiGuid.
|
Last entry VendorId must be 0.
|
**/
|
typedef struct {
|
UINT16 VendorId; ///< The vendor Id of Pci Express card ASPM setting override, 0xFFFF means any Vendor ID
|
UINT16 DeviceId; ///< The Device Id of Pci Express card ASPM setting override, 0xFFFF means any Device ID
|
UINT8 RevId; ///< The Rev Id of Pci Express card ASPM setting override, 0xFF means all steppings
|
UINT8 BaseClassCode; ///< The Base Class Code of Pci Express card ASPM setting override, 0xFF means all base class
|
UINT8 SubClassCode; ///< The Sub Class Code of Pci Express card ASPM setting override, 0xFF means all sub class
|
UINT8 EndPointAspm; ///< Override device ASPM (see: PCH_PCIE_ASPM_CONTROL)
|
///< Bit 1 must be set in OverrideConfig for this field to take effect
|
UINT16 OverrideConfig; ///< The override config bitmap (see: PCH_PCIE_OVERRIDE_CONFIG).
|
/**
|
The L1Substates Capability Offset Override. (applicable if bit 2 is set in OverrideConfig)
|
This field can be zero if only the L1 Substate value is going to be override.
|
**/
|
UINT16 L1SubstatesCapOffset;
|
/**
|
L1 Substate Capability Mask. (applicable if bit 2 is set in OverrideConfig)
|
Set to zero then the L1 Substate Capability [3:0] is ignored, and only L1s values are override.
|
Only bit [3:0] are applicable. Other bits are ignored.
|
**/
|
UINT8 L1SubstatesCapMask;
|
/**
|
L1 Substate Port Common Mode Restore Time Override. (applicable if bit 2 is set in OverrideConfig)
|
L1sCommonModeRestoreTime and L1sTpowerOnScale can have a valid value of 0, but not the L1sTpowerOnValue.
|
If L1sTpowerOnValue is zero, all L1sCommonModeRestoreTime, L1sTpowerOnScale, and L1sTpowerOnValue are ignored,
|
and only L1SubstatesCapOffset is override.
|
**/
|
UINT8 L1sCommonModeRestoreTime;
|
/**
|
L1 Substate Port Tpower_on Scale Override. (applicable if bit 2 is set in OverrideConfig)
|
L1sCommonModeRestoreTime and L1sTpowerOnScale can have a valid value of 0, but not the L1sTpowerOnValue.
|
If L1sTpowerOnValue is zero, all L1sCommonModeRestoreTime, L1sTpowerOnScale, and L1sTpowerOnValue are ignored,
|
and only L1SubstatesCapOffset is override.
|
**/
|
UINT8 L1sTpowerOnScale;
|
/**
|
L1 Substate Port Tpower_on Value Override. (applicable if bit 2 is set in OverrideConfig)
|
L1sCommonModeRestoreTime and L1sTpowerOnScale can have a valid value of 0, but not the L1sTpowerOnValue.
|
If L1sTpowerOnValue is zero, all L1sCommonModeRestoreTime, L1sTpowerOnScale, and L1sTpowerOnValue are ignored,
|
and only L1SubstatesCapOffset is override.
|
**/
|
UINT8 L1sTpowerOnValue;
|
|
/**
|
SnoopLatency bit definition
|
Note: All Reserved bits must be set to 0
|
|
BIT[15] - When set to 1b, indicates that the values in bits 9:0 are valid
|
When clear values in bits 9:0 will be ignored
|
BITS[14:13] - Reserved
|
BITS[12:10] - Value in bits 9:0 will be multiplied with the scale in these bits
|
000b - 1 ns
|
001b - 32 ns
|
010b - 1024 ns
|
011b - 32,768 ns
|
100b - 1,048,576 ns
|
101b - 33,554,432 ns
|
110b - Reserved
|
111b - Reserved
|
BITS[9:0] - Snoop Latency Value. The value in these bits will be multiplied with
|
the scale in bits 12:10
|
|
This field takes effect only if bit 3 is set in OverrideConfig.
|
**/
|
UINT16 SnoopLatency;
|
/**
|
NonSnoopLatency bit definition
|
Note: All Reserved bits must be set to 0
|
|
BIT[15] - When set to 1b, indicates that the values in bits 9:0 are valid
|
When clear values in bits 9:0 will be ignored
|
BITS[14:13] - Reserved
|
BITS[12:10] - Value in bits 9:0 will be multiplied with the scale in these bits
|
000b - 1 ns
|
001b - 32 ns
|
010b - 1024 ns
|
011b - 32,768 ns
|
100b - 1,048,576 ns
|
101b - 33,554,432 ns
|
110b - Reserved
|
111b - Reserved
|
BITS[9:0] - Non Snoop Latency Value. The value in these bits will be multiplied with
|
the scale in bits 12:10
|
|
This field takes effect only if bit 3 is set in OverrideConfig.
|
**/
|
UINT16 NonSnoopLatency;
|
|
UINT32 Reserved;
|
} PCH_PCIE_DEVICE_OVERRIDE;
|
|
#endif // PCH_PCIE_DEVICE_TABLE_H_
|
