/** @file
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Header file for Cpu Common Lib implementation.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _CPU_COMMON_LIB_H_
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#define _CPU_COMMON_LIB_H_
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typedef UINT32 CPU_RESET_TYPE;
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#define NO_RESET 0
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#define WARM_RESET BIT0
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#define COLD_RESET (BIT0 | BIT1)
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/**
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Set up flags in CR4 for XMM instruction enabling
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**/
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VOID
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EFIAPI
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XmmInit (
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VOID
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);
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/**
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Enable "Machine Check Enable"
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**/
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VOID
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EFIAPI
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EnableMce (
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VOID
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);
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/**
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Mtrr Synch Up Entry
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**/
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UINTN
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EFIAPI
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MpMtrrSynchUpEntry (
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VOID
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);
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/**
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Mtrr Synch Up Exit
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**/
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VOID
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EFIAPI
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MpMtrrSynchUpExit (
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UINTN Cr4
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);
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/**
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This procedure sends an IPI to the designated processor in
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the requested delivery mode with the requested vector.
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@param[in] ApicID - APIC ID of processor.
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@param[in] VectorNumber - Vector number.
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@param[in] DeliveryMode - I/O APIC Interrupt Deliver Modes
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@retval EFI_INVALID_PARAMETER - Input paramters were not correct.
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@retval EFI_NOT_READY - There was a pending interrupt
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@retval EFI_SUCCESS - Interrupt sent successfully
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**/
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EFI_STATUS
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EFIAPI
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CpuSendIpi (
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IN UINT32 ApicID,
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IN UINTN VectorNumber,
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IN UINTN DeliveryMode
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);
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/**
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Get APIC ID of processor
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@retval APIC ID of processor
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**/
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UINT32
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GetCpuApicId (
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VOID
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);
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/**
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Programs XAPIC registers.
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@param[in] Bsp - Is this BSP?
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**/
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VOID
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ProgramXApic (
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BOOLEAN Bsp
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);
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/**
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This function is to disable BIOS Write Protect in SMM phase.
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**/
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VOID
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EFIAPI
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CpuSmmDisableBiosWriteProtect (
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VOID
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);
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/**
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This function is to enable BIOS Write Protect in SMM phase.
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**/
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VOID
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EFIAPI
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CpuSmmEnableBiosWriteProtect (
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VOID
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);
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/**
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This function returns the maximum number of cores supported in this physical processor package.
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@retval Maximum number of supported cores in the package.
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**/
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UINT8
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GetMaxSupportedCoreCount (
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VOID
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);
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/**
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This function returns the actual factory-configured number of threads per core,
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and actual factory-configured number of cores in this physical processor package.
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@param[out] *ThreadsPerCore - variable that will store Maximum enabled threads per core
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@param[out] *NumberOfCores - variable that will store Maximum enabled cores per die
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**/
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VOID
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GetSupportedCount (
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OUT UINT16 *ThreadsPerCore, OPTIONAL
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OUT UINT16 *NumberOfCores OPTIONAL
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);
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/**
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Check to see if the executing thread is BSP
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@retval TRUE Executing thread is BSP
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@retval FALSE Executing thread is AP
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**/
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BOOLEAN
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IsBsp (
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VOID
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);
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/**
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Return TRUE if PRMRR base was already set on this core and was
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locked
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@retval TRUE PRMRR base was already set
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@retval FALSE PRMRR base wasn't set
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**/
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BOOLEAN
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IsPrmrrAlreadySet (
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VOID
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);
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/**
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Check if this is non-core processor - HT AP thread
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@retval TRUE if this is HT AP thread
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@retval FALSE if this is core thread
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**/
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BOOLEAN
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IsSecondaryThread (
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VOID
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);
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/**
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Based on ResetType, perform warm or cold reset using PCH reset PPI.
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@param[in] ResetType - CPU_RESET_TYPE to indicate which reset should be performed.
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@retval EFI_SUCCESS - Function successful (system should already reset).
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@retval EFI_UNSUPPORTED - Reset type unsupported.
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**/
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EFI_STATUS
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PerformWarmOrColdReset (
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IN CPU_RESET_TYPE ResetType
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);
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#endif
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