/** @file
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MISC DXE policy definitions
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _MISC_DXE_CONFIG_H_
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#define _MISC_DXE_CONFIG_H_
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#pragma pack(push, 1)
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#define MISC_DXE_CONFIG_REVISION 2
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/**
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This data structure includes miscellaneous configuration variables such SA thermal device
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control. The data elements should be initialized by a Platform Module.\n
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<b>Revision 1</b>:
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- Initial version.
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<b>Revision 2:</b>
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- Added RmrrCsmeBaseAddress fields.
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Offset 0-27 Config Block Header
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EFI_PHYSICAL_ADDRESS *RmrrUsbBaseAddress; ///< Offset 28 The field is used to describe the platform USB Reserved memory for Intel VT-d support. Platform code should provide this information for Intel VT-d DXE driver use
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UINT32 EnableAbove4GBMmio : 1; ///< Offset 29:0 Enable/disable above 4GB MMIO resource support: <b>0=Disable</b>, 1=Enable
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UINT32 RsvdBits0 : 31; ///< Offset 29:1 Reserved bits.
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EFI_PHYSICAL_ADDRESS *RmrrCsmeBaseAddress; ///< The field is used to describe the CSME Reserved memory.
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} MISC_DXE_CONFIG;
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#pragma pack(pop)
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#endif // _MISC_DXE_CONFIG_H_
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