/** @file
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Memory DXE Policy definitions
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _MEMORY_DXE_CONFIG_H_
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#define _MEMORY_DXE_CONFIG_H_
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#pragma pack(push, 1)
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#define MEMORY_DXE_CONFIG_REVISION 1
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/**
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The Memory Configuration includes DIMM SPD address Map and DIMM Slot Mechanical present bit map.
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The data elements should be initialized by a Platform Module.\n
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<b>Revision 1</b>:
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- Initial version.
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Offset 0-27: Config Block Header
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/**
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Offset 28:
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Dimm SPD address
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Only Server support 2 channels * 3 slots per channel = 6 sockets totally
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The Desktop and mobile only support 2 channels * 2 slots per channel = 4 sockets totally
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So there is mapping rule here for Desktop and mobile that there are no more 4 DIMMS totally in a system:
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Channel A/ Slot 0 --> Dimm 0 --> SpdAddressTable[0]
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Channel A/ Slot 1 --> Dimm 1 --> SpdAddressTable[1]
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Channel B/ Slot 0 --> Dimm 2 --> SpdAddressTable[2]
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Channel B/ Slot 1 --> Dimm 3 --> SpdAddressTable[3]
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Refer to SmbiosMemory.c for use
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If change the mapping rule, please update the Revision number.
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**/
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UINT8 *SpdAddressTable;
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/**
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Offset 36:
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Channel A DIMM Slot Mechanical present bit map, bit 0 -> DIMM 0, bit 1 -> DIMM1, ...
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if the bit is 1, the related DIMM slot is present.
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E.g. if channel A has 2 DIMMs, ChannelASlotMap = 0x03;
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E.g. if channel A has only 1 DIMMs, ChannelASlotMap = 0x01;
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Refer to SmbiosMemory.c
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**/
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UINT8 ChannelASlotMap;
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/**
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Offset 37:
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Channel B DIMM Slot Mechanical present bit map, bit 0 -> DIMM 0, bit 1 -> DIMM1, ...
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if the bit is 1, the related DIMM slot is present.
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E.g. if channel B has 2 DIMMs, ChannelBSlotMap = 0x03;
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E.g. if channel B has only 1 DIMMs, ChannelBSlotMap = 0x01;
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Refer to SmbiosMemory.c
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**/
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UINT8 ChannelBSlotMap;
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UINT8 MrcTimeMeasure; ///< Offset 38: MRC execution time measurement: <b>0=Disable</b>, 1=Enable
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UINT8 MrcFastBoot; ///< Offset 39: Fast boot: 0=Disable, <b>1=Enable</b>
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} MEMORY_DXE_CONFIG;
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#pragma pack(pop)
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#endif // _MEMORY_DXE_CONFIG_H_
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