/** @file
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Graphics DXE Policy definitions
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _GRAPHICS_DXE_CONFIG_H_
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#define _GRAPHICS_DXE_CONFIG_H_
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#pragma pack(push, 1)
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#define GRAPHICS_DXE_CONFIG_REVISION 2
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#define MAX_BCLM_ENTRIES 20
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/**
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This configuration block is to configure IGD related variables used in DXE.
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If Intel Gfx Device is not supported or disabled, all policies will be ignored.
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The data elements should be initialized by a Platform Module.\n
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<b>Revision 1</b>:
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- Initial version.
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<b>Revision 2</b>:
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- Adding BCLM[MAX_BCLM_ENTRIES]
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Offset 0-27: Config Block Header
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UINT32 Size; ///< Offset 28 - 31: This field gives the size of the GOP VBT Data buffer
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EFI_PHYSICAL_ADDRESS VbtAddress; ///< Offset 32 - 39: This field points to the GOP VBT data buffer
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UINT8 PlatformConfig; ///< Offset 40: This field gives the Platform Configuration Information (0=Platform is S0ix Capable for ULT SKUs only, <b>1=Platform is not S0ix Capable</b>, 2=Force Platform is S0ix Capable for All SKUs)
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UINT8 AlsEnable; ///< Offset 41: Ambient Light Sensor Enable: <b>0=Disable</b>, 2=Enable
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UINT8 BacklightControlSupport; ///< Offset 42: Backlight Control Support: 0=PWM Inverted, <b>2=PWM Normal</b>
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UINT8 IgdBootType; ///< Offset 43: IGD Boot Type CMOS option: <b>0=Default</b>, 0x01=CRT, 0x04=EFP, 0x08=LFP, 0x20=EFP3, 0x40=EFP2, 0x80=LFP2
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UINT32 IuerStatusVal; ///< Offset 44 - 47: Offset 16 This field holds the current status of all the supported Ultrabook events (Intel(R) Ultrabook Event Status bits)
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CHAR16 GopVersion[0x10]; ///< Offset 48 - 79:This field holds the GOP Driver Version. It is an Output Protocol and updated by the Silicon code
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/**
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Offset 80: IGD Panel Type CMOS option\n
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<b>0=Default</b>, 1=640X480LVDS, 2=800X600LVDS, 3=1024X768LVDS, 4=1280X1024LVDS, 5=1400X1050LVDS1\n
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6=1400X1050LVDS2, 7=1600X1200LVDS, 8=1280X768LVDS, 9=1680X1050LVDS, 10=1920X1200LVDS, 13=1600X900LVDS\n
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14=1280X800LVDS, 15=1280X600LVDS, 16=2048X1536LVDS, 17=1366X768LVDS
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**/
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UINT8 IgdPanelType;
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UINT8 IgdPanelScaling; ///< Offset 81: IGD Panel Scaling: <b>0=AUTO</b>, 1=OFF, 6=Force scaling
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UINT8 IgdBlcConfig; ///< Offset 82: Backlight Control Support: 0=PWM Inverted, <b>2=PWM Normal</b>
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UINT8 IgdDvmtMemSize; ///< Offset 83: IGD DVMT Memory Size: 1=128MB, <b>2=256MB</b>, 3=MAX
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UINT8 GfxTurboIMON; ///< Offset 84: IMON Current Value: 14=Minimal, <b>31=Maximum</b>
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UINT8 Reserved[3]; ///< Offset 85: Reserved for DWORD alignment.
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UINT16 BCLM[MAX_BCLM_ENTRIES]; ///< Offset 88: IGD Backlight Brightness Level Duty cycle Mapping Table.
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} GRAPHICS_DXE_CONFIG;
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#pragma pack(pop)
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#endif // _GRAPHICS_DXE_CONFIG_H_
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