/** @file
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This file is PeiCpuPolicy library.
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Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "PeiCpuPolicyLibrary.h"
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#include <SaAccess.h>
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#include <CpuAccess.h>
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#include <IndustryStandard/Pci22.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/SaPlatformLib.h>
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#include <Library/ConfigBlockLib.h>
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#include <Library/PostCodeLib.h>
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#include <Library/PcdLib.h>
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#ifndef FSP_FLAG
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/**
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Get the next microcode patch pointer.
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@param[in, out] MicrocodeData - Input is a pointer to the last microcode patch address found,
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and output points to the next patch address found.
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@retval EFI_SUCCESS - Patch found.
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@retval EFI_NOT_FOUND - Patch not found.
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**/
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EFI_STATUS
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EFIAPI
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RetrieveMicrocode (
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IN OUT CPU_MICROCODE_HEADER **MicrocodeData
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)
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{
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UINTN MicrocodeStart;
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UINTN MicrocodeEnd;
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UINTN TotalSize;
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if ((FixedPcdGet32 (PcdFlashMicrocodeFvBase) == 0) || (FixedPcdGet32 (PcdFlashMicrocodeFvSize) == 0)) {
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return EFI_NOT_FOUND;
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}
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///
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/// Microcode binary in SEC
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///
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MicrocodeStart = (UINTN) FixedPcdGet32 (PcdFlashMicrocodeFvBase) +
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((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FixedPcdGet32 (PcdFlashMicrocodeFvBase))->HeaderLength +
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sizeof (EFI_FFS_FILE_HEADER);
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MicrocodeEnd = (UINTN) FixedPcdGet32 (PcdFlashMicrocodeFvBase) + (UINTN) FixedPcdGet32 (PcdFlashMicrocodeFvSize);
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if (*MicrocodeData == NULL) {
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*MicrocodeData = (CPU_MICROCODE_HEADER *) (UINTN) MicrocodeStart;
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} else {
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if (*MicrocodeData < (CPU_MICROCODE_HEADER *) (UINTN) MicrocodeStart) {
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DEBUG ((DEBUG_INFO, "[CpuPolicy]*MicrocodeData < MicrocodeStart \n"));
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return EFI_NOT_FOUND;
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}
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TotalSize = (UINTN) ((*MicrocodeData)->TotalSize);
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if (TotalSize == 0) {
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TotalSize = 2048;
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}
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*MicrocodeData = (CPU_MICROCODE_HEADER *) ((UINTN)*MicrocodeData + TotalSize);
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if (*MicrocodeData >= (CPU_MICROCODE_HEADER *) (UINTN) (MicrocodeEnd) || (*MicrocodeData)->TotalSize == (UINT32) -1) {
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DEBUG ((DEBUG_INFO, "[CpuPolicy]*MicrocodeData >= MicrocodeEnd \n"));
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return EFI_NOT_FOUND;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Get the microcode patch pointer.
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@retval EFI_PHYSICAL_ADDRESS - Address of the microcode patch, or NULL if not found.
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**/
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EFI_PHYSICAL_ADDRESS
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PlatformCpuLocateMicrocodePatch (
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VOID
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)
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{
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EFI_STATUS Status;
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CPU_MICROCODE_HEADER *MicrocodeData;
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EFI_CPUID_REGISTER Cpuid;
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UINT32 UcodeRevision;
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UINTN MicrocodeBufferSize;
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VOID *MicrocodeBuffer = NULL;
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AsmCpuid (
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CPUID_VERSION_INFO,
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&Cpuid.RegEax,
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&Cpuid.RegEbx,
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&Cpuid.RegEcx,
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&Cpuid.RegEdx
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);
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UcodeRevision = GetCpuUcodeRevision ();
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MicrocodeData = NULL;
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while (TRUE) {
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///
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/// Find the next patch address
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///
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Status = RetrieveMicrocode (&MicrocodeData);
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DEBUG ((DEBUG_INFO, "MicrocodeData = %x\n", MicrocodeData));
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if (Status != EFI_SUCCESS) {
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break;
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} else if (CheckMicrocode (Cpuid.RegEax, MicrocodeData, &UcodeRevision)) {
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break;
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}
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}
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if (EFI_ERROR (Status)) {
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return (EFI_PHYSICAL_ADDRESS) (UINTN) NULL;
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}
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///
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/// Check that microcode patch size is <= 128K max size,
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/// then copy the patch from FV to temp buffer for faster access.
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///
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MicrocodeBufferSize = (UINTN) MicrocodeData->TotalSize;
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if (MicrocodeBufferSize <= MAX_MICROCODE_PATCH_SIZE) {
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MicrocodeBuffer = AllocatePages (EFI_SIZE_TO_PAGES (MicrocodeBufferSize));
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if (MicrocodeBuffer != NULL) {
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DEBUG(( DEBUG_INFO, "Copying Microcode to temp buffer.\n"));
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CopyMem (MicrocodeBuffer, MicrocodeData, MicrocodeBufferSize);
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return (EFI_PHYSICAL_ADDRESS) (UINTN) MicrocodeBuffer;
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} else {
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DEBUG(( DEBUG_ERROR, "Failed to allocate enough memory for Microcode Patch.\n"));
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}
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} else {
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DEBUG(( DEBUG_ERROR, "Microcode patch size is greater than max allowed size of 128K.\n"));
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}
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return (EFI_PHYSICAL_ADDRESS) (UINTN) NULL;
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}
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#endif
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/**
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Load Config block default
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@param[in] ConfigBlockPointer Pointer to config block
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**/
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VOID
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LoadCpuConfigDefault (
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IN VOID *ConfigBlockPointer
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)
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{
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CPU_CONFIG *CpuConfig;
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CpuConfig = ConfigBlockPointer;
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DEBUG ((DEBUG_INFO, "CpuConfig->Header.GuidHob.Name = %g\n", &CpuConfig->Header.GuidHob.Name));
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DEBUG ((DEBUG_INFO, "CpuConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuConfig->Header.GuidHob.Header.HobLength));
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/********************************
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CPU configuration
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********************************/
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CpuConfig->AesEnable = CPU_FEATURE_ENABLE;
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#ifndef FSP_FLAG
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CpuConfig->MicrocodePatchAddress = PlatformCpuLocateMicrocodePatch ();
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#endif //FSP_FLAG
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}
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/**
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Load Config block default
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@param[in] ConfigBlockPointer Pointer to config block
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**/
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VOID
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LoadCpuSgxConfigDefault (
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IN VOID *ConfigBlockPointer
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)
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{
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/********************************
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CPU SGX configuration
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********************************/
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}
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/**
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Load Config block default
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@param[in] ConfigBlockPointer Pointer to config block
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**/
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VOID
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LoadCpuPowerMgmtBasicConfigDefault (
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IN VOID *ConfigBlockPointer
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)
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{
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CPU_POWER_MGMT_BASIC_CONFIG *CpuPowerMgmtBasicConfig;
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CPU_SKU CpuSku;
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MSR_REGISTER TempMsr;
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CpuPowerMgmtBasicConfig = ConfigBlockPointer;
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CpuSku = GetCpuSku();
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DEBUG ((DEBUG_INFO, "CpuPowerMgmtBasicConfig->Header.GuidHob.Name = %g\n", &CpuPowerMgmtBasicConfig->Header.GuidHob.Name));
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DEBUG ((DEBUG_INFO, "CpuPowerMgmtBasicConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuPowerMgmtBasicConfig->Header.GuidHob.Header.HobLength));
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/********************************
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CPU Power Management Basic configuration
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********************************/
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CpuPowerMgmtBasicConfig->Hwp = TRUE;
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CpuPowerMgmtBasicConfig->HdcControl = TRUE;
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CpuPowerMgmtBasicConfig->PowerLimit2 = TRUE;
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CpuPowerMgmtBasicConfig->PowerLimit3Lock = TRUE;
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CpuPowerMgmtBasicConfig->TccOffsetLock = FALSE;
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CpuPowerMgmtBasicConfig->EnableItbm = TRUE;
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CpuPowerMgmtBasicConfig->EnableItbmDriver = FALSE;
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///
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/// Initialize RATL (Runtime Average Temperature Limit) Config for ULX.
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///
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if (CpuSku == EnumCpuUlx) {
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CpuPowerMgmtBasicConfig->TccActivationOffset = 15;
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CpuPowerMgmtBasicConfig->TccOffsetTimeWindowForRatl = 5000; // 5 sec
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CpuPowerMgmtBasicConfig->TccOffsetClamp = CPU_FEATURE_ENABLE;
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}
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CpuPowerMgmtBasicConfig->TurboMode = TRUE;
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TempMsr.Qword = AsmReadMsr64 (MSR_TURBO_RATIO_LIMIT);
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CpuPowerMgmtBasicConfig->OneCoreRatioLimit = TempMsr.Bytes.FirstByte;
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CpuPowerMgmtBasicConfig->TwoCoreRatioLimit = TempMsr.Bytes.SecondByte;
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CpuPowerMgmtBasicConfig->ThreeCoreRatioLimit = TempMsr.Bytes.ThirdByte;
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CpuPowerMgmtBasicConfig->FourCoreRatioLimit = TempMsr.Bytes.FouthByte;
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CpuPowerMgmtBasicConfig->FiveCoreRatioLimit = TempMsr.Bytes.FifthByte;
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CpuPowerMgmtBasicConfig->SixCoreRatioLimit = TempMsr.Bytes.SixthByte;
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CpuPowerMgmtBasicConfig->SevenCoreRatioLimit = TempMsr.Bytes.SeventhByte;
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CpuPowerMgmtBasicConfig->EightCoreRatioLimit = TempMsr.Bytes.EighthByte;
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}
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/**
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Load Config block default
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@param[in] ConfigBlockPointer Pointer to config block
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**/
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VOID
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LoadCpuPowerMgmtCustomConfigDefault (
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IN VOID *ConfigBlockPointer
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)
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{
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CPU_POWER_MGMT_CUSTOM_CONFIG *CpuPowerMgmtCustomConfig;
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CpuPowerMgmtCustomConfig = ConfigBlockPointer;
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DEBUG ((DEBUG_INFO, "CpuPowerMgmtCustomConfig->Header.GuidHob.Name = %g\n", &CpuPowerMgmtCustomConfig->Header.GuidHob.Name));
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DEBUG ((DEBUG_INFO, "CpuPowerMgmtCustomConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuPowerMgmtCustomConfig->Header.GuidHob.Header.HobLength));
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/********************************
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CPU Power Management Custom configuration
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********************************/
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CpuPowerMgmtCustomConfig->CustomRatioTable.Cpuid = (UINT16) ((GetCpuFamily() | GetCpuStepping()) & (0x0FFF));
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}
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/**
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Load Config block default
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@param[in] ConfigBlockPointer Pointer to config block
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**/
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VOID
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LoadCpuTestConfigDefault (
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IN VOID *ConfigBlockPointer
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)
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{
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CPU_TEST_CONFIG *CpuTestConfig;
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CPU_SKU CpuSku;
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CpuTestConfig = ConfigBlockPointer;
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DEBUG ((DEBUG_INFO, "CpuTestConfig->Header.GuidHob.Name = %g\n", &CpuTestConfig->Header.GuidHob.Name));
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DEBUG ((DEBUG_INFO, "CpuTestConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuTestConfig->Header.GuidHob.Header.HobLength));
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CpuSku = GetCpuSku();
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/********************************
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CPU Test configuration
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********************************/
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CpuTestConfig->MlcStreamerPrefetcher = CPU_FEATURE_ENABLE;
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CpuTestConfig->MlcSpatialPrefetcher = CPU_FEATURE_ENABLE;
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CpuTestConfig->MonitorMwaitEnable = CPU_FEATURE_ENABLE;
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CpuTestConfig->MachineCheckEnable = CPU_FEATURE_ENABLE;
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CpuTestConfig->DebugInterfaceLockEnable = CPU_FEATURE_ENABLE;
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if ((CpuSku == EnumCpuUlx) || (CpuSku == EnumCpuUlt)){
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/**
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This policy should be used to enable or disable Voltage Optimization feature. Recommended defaults:
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Enable - For Mobile SKUs(U/Y)
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Disable - Rest of all SKUs other than Mobile.
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**/
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CpuTestConfig->VoltageOptimization = CPU_FEATURE_ENABLE;
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}
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else {
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CpuTestConfig->VoltageOptimization = CPU_FEATURE_DISABLE;
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}
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}
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/**
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Load Config block default
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@param[in] ConfigBlockPointer Pointer to config block
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**/
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VOID
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LoadCpuPidTestConfigDefault (
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IN VOID *ConfigBlockPointer
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)
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{
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CPU_PID_TEST_CONFIG *CpuPidTestConfig;
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CpuPidTestConfig = ConfigBlockPointer;
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DEBUG ((DEBUG_INFO, "CpuPidTestConfig->Header.GuidHob.Name = %g\n", &CpuPidTestConfig->Header.GuidHob.Name));
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DEBUG ((DEBUG_INFO, "CpuPidTestConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuPidTestConfig->Header.GuidHob.Header.HobLength));
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/********************************
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CPU PID Test configuration
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********************************/
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}
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/**
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Load Config block default
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@param[in] ConfigBlockPointer Pointer to config block
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**/
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VOID
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LoadCpuPowerMgmtTestConfigDefault (
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IN VOID *ConfigBlockPointer
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)
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{
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CPU_POWER_MGMT_TEST_CONFIG *CpuPowerMgmtTestConfig;
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CPU_GENERATION CpuGeneration;
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UINT16 CpuDid;
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CpuPowerMgmtTestConfig = ConfigBlockPointer;
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CpuDid = PciSegmentRead16 (PCI_SEGMENT_LIB_ADDRESS (SA_SEG_NUM, SA_MC_BUS, SA_MC_DEV, SA_MC_FUN, R_SA_MC_DEVICE_ID));
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DEBUG ((DEBUG_INFO, "CpuPowerMgmtTestConfig->Header.GuidHob.Name = %g\n", &CpuPowerMgmtTestConfig->Header.GuidHob.Name));
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DEBUG ((DEBUG_INFO, "CpuPowerMgmtTestConfig->Header.GuidHob.Header.HobLength = 0x%x\n", CpuPowerMgmtTestConfig->Header.GuidHob.Header.HobLength));
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/********************************
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CPU Power Management Test configuration
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********************************/
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CpuPowerMgmtTestConfig->Eist = TRUE;
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CpuPowerMgmtTestConfig->EnergyEfficientPState = TRUE;
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CpuPowerMgmtTestConfig->EnergyEfficientTurbo = TRUE;
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if ((CpuDid == V_SA_DEVICE_ID_CFL_DT_1) || (CpuDid == V_SA_DEVICE_ID_CFL_DT_2)
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|| (CpuDid == V_SA_DEVICE_ID_CFL_DT_3) || (CpuDid == V_SA_DEVICE_ID_CFL_DT_4)) {
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///
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/// CFL-S 6+2, CFL S 8+2, CFl S 4+2, CFL S 2+2
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///
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CpuPowerMgmtTestConfig->EnergyEfficientTurbo = FALSE;
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}
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CpuPowerMgmtTestConfig->BiProcHot = TRUE;
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CpuPowerMgmtTestConfig->DisableProcHotOut = TRUE;
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CpuPowerMgmtTestConfig->AutoThermalReporting = TRUE;
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CpuPowerMgmtTestConfig->ThermalMonitor = TRUE;
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CpuPowerMgmtTestConfig->Cx = TRUE;
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CpuPowerMgmtTestConfig->PmgCstCfgCtrlLock = TRUE;
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CpuPowerMgmtTestConfig->C1e = TRUE;
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CpuPowerMgmtTestConfig->C1AutoDemotion = TRUE;
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CpuPowerMgmtTestConfig->C1UnDemotion = TRUE;
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CpuGeneration = GetCpuGeneration();
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if(CpuGeneration == EnumCflCpu){
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CpuPowerMgmtTestConfig->C3AutoDemotion = TRUE;
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CpuPowerMgmtTestConfig->C3UnDemotion = TRUE;
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}
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CpuPowerMgmtTestConfig->CStatePreWake = TRUE;
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CpuPowerMgmtTestConfig->RaceToHalt = TRUE;
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CpuPowerMgmtTestConfig->CstateLatencyControl0TimeUnit = TimeUnit1024ns;
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CpuPowerMgmtTestConfig->CstateLatencyControl1TimeUnit = TimeUnit1024ns;
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CpuPowerMgmtTestConfig->CstateLatencyControl2TimeUnit = TimeUnit1024ns;
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CpuPowerMgmtTestConfig->CstateLatencyControl3TimeUnit = TimeUnit1024ns;
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CpuPowerMgmtTestConfig->CstateLatencyControl4TimeUnit = TimeUnit1024ns;
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CpuPowerMgmtTestConfig->CstateLatencyControl5TimeUnit = TimeUnit1024ns;
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CpuPowerMgmtTestConfig->CstateLatencyControl0Irtl = C3_LATENCY;
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CpuPowerMgmtTestConfig->CstateLatencyControl1Irtl = C6_C7_SHORT_LATENCY;
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CpuPowerMgmtTestConfig->CstateLatencyControl2Irtl = C6_C7_LONG_LATENCY;
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CpuPowerMgmtTestConfig->CstateLatencyControl3Irtl = C8_LATENCY;
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CpuPowerMgmtTestConfig->CstateLatencyControl4Irtl = C9_LATENCY;
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CpuPowerMgmtTestConfig->CstateLatencyControl5Irtl = C10_LATENCY;
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CpuPowerMgmtTestConfig->PkgCStateLimit = PkgAuto;
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CpuPowerMgmtTestConfig->CustomPowerUnit = PowerUnit125MilliWatts;
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CpuPowerMgmtTestConfig->PpmIrmSetting = PpmIrmPairFixedPriority;
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}
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static COMPONENT_BLOCK_ENTRY mCpuIpBlocks [] = {
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{&gCpuConfigGuid, sizeof (CPU_CONFIG), CPU_CONFIG_REVISION, LoadCpuConfigDefault},
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{&gCpuPowerMgmtBasicConfigGuid, sizeof (CPU_POWER_MGMT_BASIC_CONFIG), CPU_POWER_MGMT_BASIC_CONFIG_REVISION, LoadCpuPowerMgmtBasicConfigDefault},
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{&gCpuPowerMgmtCustomConfigGuid, sizeof (CPU_POWER_MGMT_CUSTOM_CONFIG), CPU_POWER_MGMT_CUSTOM_CONFIG_REVISION, LoadCpuPowerMgmtCustomConfigDefault},
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{&gCpuTestConfigGuid, sizeof (CPU_TEST_CONFIG), CPU_TEST_CONFIG_REVISION, LoadCpuTestConfigDefault},
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{&gCpuPidTestConfigGuid, sizeof (CPU_PID_TEST_CONFIG), CPU_PID_TEST_CONFIG_REVISION, LoadCpuPidTestConfigDefault},
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{&gCpuPowerMgmtTestConfigGuid, sizeof (CPU_POWER_MGMT_TEST_CONFIG), CPU_POWER_MGMT_TEST_CONFIG_REVISION, LoadCpuPowerMgmtTestConfigDefault},
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};
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/**
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Get CPU config block table total size.
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@retval Size of CPU config block table
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**/
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UINT16
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EFIAPI
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CpuGetConfigBlockTotalSize (
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VOID
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)
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{
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return GetComponentConfigBlockTotalSize (&mCpuIpBlocks[0], sizeof (mCpuIpBlocks) / sizeof (COMPONENT_BLOCK_ENTRY));
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}
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/**
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CpuAddConfigBlocks add all Cpu config blocks.
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@param[in] ConfigBlockTableAddress The pointer to add CPU config blocks
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@retval EFI_SUCCESS The policy default is initialized.
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@retval EFI_OUT_OF_RESOURCES Insufficient resources to create buffer
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**/
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EFI_STATUS
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EFIAPI
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CpuAddConfigBlocks (
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IN VOID *ConfigBlockTableAddress
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)
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{
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EFI_STATUS Status;
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DEBUG((DEBUG_INFO, "CPU Post-Mem Entry \n"));
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PostCode (0xC00);
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Status = AddComponentConfigBlocks (ConfigBlockTableAddress, &mCpuIpBlocks[0], sizeof (mCpuIpBlocks) / sizeof (COMPONENT_BLOCK_ENTRY));
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DEBUG ((DEBUG_INFO, "CpuAddConfigBlocks Done \n"));
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PostCode (0xC09);
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return Status;
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}
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