/** @file
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*
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* Copyright (c) Microsoft Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <IndustryStandard/Bcm2836.h>
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#ifndef __BCM2836_SDIO_H__
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#define __BCM2836_SDIO_H__
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// MMC/SD/SDIO1 register definitions.
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#define MMCHS1_OFFSET 0x00300000
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#define MMCHS2_OFFSET 0x00340000
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#define MMCHS1_BASE (BCM2836_SOC_REGISTERS + MMCHS1_OFFSET)
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#define MMCHS2_BASE (BCM2836_SOC_REGISTERS + MMCHS2_OFFSET)
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#define MMCHS1_LENGTH 0x00000100
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#define MMCHS2_LENGTH 0x00000100
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#define MMCHS_BLK (mMmcHsBase + 0x4)
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#define BLEN_512BYTES (0x200UL << 0)
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#define MMCHS_ARG (mMmcHsBase + 0x8)
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#define MMCHS_CMD (mMmcHsBase + 0xC)
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#define BCE_ENABLE BIT1
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#define DDIR_READ BIT4
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#define DDIR_WRITE (0x0UL << 4)
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#define MSBS_SGLEBLK (0x0UL << 5)
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#define MSBS_MULTBLK BIT5
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#define RSP_TYPE_MASK (0x3UL << 16)
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#define RSP_TYPE_136BITS BIT16
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#define RSP_TYPE_48BITS (0x2UL << 16)
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#define RSP_TYPE_48BUSY (0x3UL << 16)
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#define CCCE_ENABLE BIT19
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#define CICE_ENABLE BIT20
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#define DP_ENABLE BIT21
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#define CMD_TYPE_NORMAL 0
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#define CMD_TYPE_ABORT 3
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#define TYPE(CMD_TYPE) (((CMD_TYPE) & 0x3) << 22)
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#define _INDX(CMD_INDX) ((CMD_INDX & 0x3F) << 24)
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#define MMC_CMD_NUM(CMD) (((CMD) >> 24) & 0x3F)
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#define INDX(CMD_INDX) (TYPE(CMD_TYPE_NORMAL) | _INDX(CMD_INDX))
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#define INDX_ABORT(CMD_INDX) (TYPE(CMD_TYPE_ABORT) | _INDX(CMD_INDX))
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#define MMCHS_RSP10 (mMmcHsBase + 0x10)
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#define MMCHS_RSP32 (mMmcHsBase + 0x14)
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#define MMCHS_RSP54 (mMmcHsBase + 0x18)
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#define MMCHS_RSP76 (mMmcHsBase + 0x1C)
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#define MMCHS_DATA (mMmcHsBase + 0x20)
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#define MMCHS_PRES_STATE (mMmcHsBase + 0x24)
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#define CMDI_MASK BIT0
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#define CMDI_ALLOWED (0x0UL << 0)
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#define CMDI_NOT_ALLOWED BIT0
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#define DATI_MASK BIT1
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#define DATI_ALLOWED (0x0UL << 1)
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#define DATI_NOT_ALLOWED BIT1
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#define WRITE_PROTECT_OFF BIT19
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#define MMCHS_HCTL (mMmcHsBase + 0x28)
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#define DTW_1_BIT (0x0UL << 1)
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#define DTW_4_BIT BIT1
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#define SDBP_MASK BIT8
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#define SDBP_OFF (0x0UL << 8)
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#define SDBP_ON BIT8
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#define SDVS_MASK (0x7UL << 9)
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#define SDVS_1_8_V (0x5UL << 9)
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#define SDVS_3_0_V (0x6UL << 9)
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#define SDVS_3_3_V (0x7UL << 9)
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#define IWE BIT24
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#define MMCHS_SYSCTL (mMmcHsBase + 0x2C)
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#define ICE BIT0
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#define ICS_MASK BIT1
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#define ICS BIT1
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#define CEN BIT2
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#define CLKD_MASK (0x3FFUL << 6)
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#define CLKD_80KHZ (0x258UL) //(96*1000/80)/2
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#define CLKD_400KHZ (0xF0UL)
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#define CLKD_12500KHZ (0x200UL)
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#define DTO_MASK (0xFUL << 16)
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#define DTO_VAL (0xEUL << 16)
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#define SRA BIT24
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#define SRC_MASK BIT25
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#define SRC BIT25
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#define SRD BIT26
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#define MMCHS_INT_STAT (mMmcHsBase + 0x30)
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#define CC BIT0
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#define TC BIT1
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#define BWR BIT4
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#define BRR BIT5
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#define CARD_INS BIT6
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#define ERRI BIT15
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#define CTO BIT16
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#define DTO BIT20
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#define DCRC BIT21
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#define DEB BIT22
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#define MMCHS_IE (mMmcHsBase + 0x34)
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#define CC_EN BIT0
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#define TC_EN BIT1
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#define BWR_EN BIT4
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#define BRR_EN BIT5
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#define CTO_EN BIT16
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#define CCRC_EN BIT17
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#define CEB_EN BIT18
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#define CIE_EN BIT19
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#define DTO_EN BIT20
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#define DCRC_EN BIT21
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#define DEB_EN BIT22
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#define CERR_EN BIT28
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#define BADA_EN BIT29
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#define ALL_EN 0xFFFFFFFF
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#define MMCHS_ISE (mMmcHsBase + 0x38)
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#define CC_SIGEN BIT0
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#define TC_SIGEN BIT1
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#define BWR_SIGEN BIT4
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#define BRR_SIGEN BIT5
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#define CTO_SIGEN BIT16
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#define CCRC_SIGEN BIT17
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#define CEB_SIGEN BIT18
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#define CIE_SIGEN BIT19
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#define DTO_SIGEN BIT20
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#define DCRC_SIGEN BIT21
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#define DEB_SIGEN BIT22
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#define CERR_SIGEN BIT28
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#define BADA_SIGEN BIT29
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#define MMCHS_AC12 (mMmcHsBase + 0x3C)
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#define MMCHS_HC2R (mMmcHsBase + 0x3E)
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#define MMCHS_CAPA (mMmcHsBase + 0x40)
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#define VS30 BIT25
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#define VS18 BIT26
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#define MMCHS_CUR_CAPA (mMmcHsBase + 0x48)
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#define MMCHS_REV (mMmcHsBase + 0xFC)
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#define BLOCK_COUNT_SHIFT 16
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#define RCA_SHIFT 16
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#define CMD_R1 (RSP_TYPE_48BITS | CCCE_ENABLE | CICE_ENABLE)
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#define CMD_R1B (RSP_TYPE_48BUSY | CCCE_ENABLE | CICE_ENABLE)
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#define CMD_R2 (RSP_TYPE_136BITS | CCCE_ENABLE)
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#define CMD_R3 (RSP_TYPE_48BITS)
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#define CMD_R6 (RSP_TYPE_48BITS | CCCE_ENABLE | CICE_ENABLE)
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#define CMD_R7 (RSP_TYPE_48BITS | CCCE_ENABLE | CICE_ENABLE)
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#define CMD_R1_ADTC (CMD_R1 | DP_ENABLE)
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#define CMD_R1_ADTC_READ (CMD_R1_ADTC | DDIR_READ)
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#define CMD_R1_ADTC_WRITE (CMD_R1_ADTC | DDIR_WRITE)
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#define CMD0 (INDX(0)) // Go idle
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#define CMD1 (INDX(1) | CMD_R3) // MMC: Send Op Cond
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#define CMD2 (INDX(2) | CMD_R2) // Send CID
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#define CMD3 (INDX(3) | CMD_R6) // Set Relative Addr
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#define CMD4 (INDX(4)) // Set DSR
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#define CMD5 (INDX(5) | CMD_R1B) // SDIO: Sleep/Awake
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#define CMD6 (INDX(6) | CMD_R1_ADTC_READ) // Switch
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#define CMD7 (INDX(7) | CMD_R1B) // Select/Deselect
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#define CMD8_SD (INDX(8) | CMD_R7) // Send If Cond
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#define CMD8_SD_ARG (0x0UL << 12 | BIT8 | 0xCEUL << 0)
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#define CMD8_MMC (INDX(8) | CMD_R1_ADTC_READ) // Send Ext Csd
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#define CMD8_MMC_ARG (0)
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#define CMD9 (INDX(9) | CMD_R2) // Send CSD
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#define CMD10 (INDX(10) | CMD_R2) // Send CID
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#define CMD11 (INDX(11) | CMD_R1) // Voltage Switch
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#define CMD12 (INDX_ABORT(12) | CMD_R1B) // Stop Transmission
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#define CMD13 (INDX(13) | CMD_R1) // Send Status
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#define CMD15 (INDX(15)) // Go inactive state
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#define CMD16 (INDX(16) | CMD_R1) // Set Blocklen
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#define CMD17 (INDX(17) | CMD_R1_ADTC_READ) // Read Single Block
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#define CMD18 (INDX(18) | CMD_R1_ADTC_READ | MSBS_MULTBLK) // Read Multiple Blocks
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#define CMD19 (INDX(19) | CMD_R1_ADTC_READ) // SD: Send Tuning Block (64 bytes)
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#define CMD20 (INDX(20) | CMD_R1B) // SD: Speed Class Control
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#define CMD23 (INDX(23) | CMD_R1) // Set Block Count for CMD18 and CMD25
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#define CMD24 (INDX(24) | CMD_R1_ADTC_WRITE) // Write Block
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#define CMD25 (INDX(25) | CMD_R1_ADTC_WRITE | MSBS_MULTBLK) // Write Multiple Blocks
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#define CMD55 (INDX(55) | CMD_R1) // App Cmd
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#define ACMD6 (INDX(6) | CMD_R1) // Set Bus Width
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#define ACMD22 (INDX(22) | CMD_R1_ADTC_READ) // SEND_NUM_WR_BLOCKS
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#define ACMD41 (INDX(41) | CMD_R3) // Send Op Cond
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#define ACMD51 (INDX(51) | CMD_R1_ADTC_READ) // Send SCR
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// User-friendly command names
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#define CMD_IO_SEND_OP_COND CMD5
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#define CMD_SEND_CSD CMD9 // CSD: Card-Specific Data
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#define CMD_STOP_TRANSMISSION CMD12
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#define CMD_SEND_STATUS CMD13
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#define CMD_READ_SINGLE_BLOCK CMD17
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#define CMD_READ_MULTIPLE_BLOCK CMD18
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#define CMD_SET_BLOCK_COUNT CMD23
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#define CMD_WRITE_SINGLE_BLOCK CMD24
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#define CMD_WRITE_MULTIPLE_BLOCK CMD25
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#endif /* __BCM2836_SDIO_H__ */
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