/** @file
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*
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* Copyright (c) 2017, Andrei Warkentin <andrey.warkentin@gmail.com>
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* Copyright (c) Microsoft Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <IndustryStandard/Bcm2836.h>
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#ifndef __BCM2836_SDHOST_H__
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#define __BCM2836_SDHOST_H__
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#define SDHOST_OFFSET 0x00202000
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#define SDHOST_BASE_ADDRESS (BCM2836_SOC_REGISTERS + SDHOST_OFFSET)
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#define SDHOST_LENGTH 0x00000100
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#define SDHOST_REG(X) (SDHOST_BASE_ADDRESS + (X))
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#define SDHOST_CMD SDHOST_REG(0x0)
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#define SDHOST_ARG SDHOST_REG(0x4)
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#define SDHOST_TOUT SDHOST_REG(0x8)
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#define SDHOST_CDIV SDHOST_REG(0xC)
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#define SDHOST_RSP0 SDHOST_REG(0x10) // [31:0]
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#define SDHOST_RSP1 SDHOST_REG(0x14) // [63:32]
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#define SDHOST_RSP2 SDHOST_REG(0x18) // [95:64]
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#define SDHOST_RSP3 SDHOST_REG(0x1C) // [127:96]
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#define SDHOST_HSTS SDHOST_REG(0x20)
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#define SDHOST_VDD SDHOST_REG(0x30)
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#define SDHOST_EDM SDHOST_REG(0x34)
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#define SDHOST_HCFG SDHOST_REG(0x38)
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#define SDHOST_HBCT SDHOST_REG(0x3C)
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#define SDHOST_DATA SDHOST_REG(0x40)
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#define SDHOST_HBLC SDHOST_REG(0x50)
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//
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// CMD
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//
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#define SDHOST_CMD_READ_CMD BIT6
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#define SDHOST_CMD_WRITE_CMD BIT7
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#define SDHOST_CMD_RESPONSE_CMD_LONG_RESP BIT9
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#define SDHOST_CMD_RESPONSE_CMD_NO_RESP BIT10
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#define SDHOST_CMD_BUSY_CMD BIT11
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#define SDHOST_CMD_FAIL_FLAG BIT14
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#define SDHOST_CMD_NEW_FLAG BIT15
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//
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// VDD
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//
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#define SDHOST_VDD_POWER_ON BIT0
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//
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// HSTS
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//
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#define SDHOST_HSTS_CLEAR 0x7F8
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#define SDHOST_HSTS_BLOCK_IRPT BIT9
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#define SDHOST_HSTS_REW_TIME_OUT BIT7
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#define SDHOST_HSTS_CMD_TIME_OUT BIT6
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#define SDHOST_HSTS_CRC16_ERROR BIT5
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#define SDHOST_HSTS_CRC7_ERROR BIT4
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#define SDHOST_HSTS_FIFO_ERROR BIT3
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#define SDHOST_HSTS_DATA_FLAG BIT0
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#define SDHOST_HSTS_TIMOUT_ERROR (SDHOST_HSTS_CMD_TIME_OUT | SDHOST_HSTS_REW_TIME_OUT)
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#define SDHOST_HSTS_TRANSFER_ERROR (SDHOST_HSTS_FIFO_ERROR | SDHOST_HSTS_CRC7_ERROR | SDHOST_HSTS_CRC16_ERROR)
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#define SDHOST_HSTS_ERROR (SDHOST_HSTS_TIMOUT_ERROR | SDHOST_HSTS_TRANSFER_ERROR)
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//
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// HCFG
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//
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#define SDHOST_HCFG_SLOW_CARD BIT3
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#define SDHOST_HCFG_WIDE_EXT_BUS BIT2
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#define SDHOST_HCFG_WIDE_INT_BUS BIT1
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#define SDHOST_HCFG_DATA_IRPT_EN BIT4
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#define SDHOST_HCFG_BLOCK_IRPT_EN BIT8
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#define SDHOST_HCFG_BUSY_IRPT_EN BIT10
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//
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// EDM
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//
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#define SDHOST_EDM_FIFO_CLEAR BIT21
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#define SDHOST_EDM_WRITE_THRESHOLD_SHIFT 9
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#define SDHOST_EDM_READ_THRESHOLD_SHIFT 14
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#define SDHOST_EDM_THRESHOLD_MASK 0x1F
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#define SDHOST_EDM_READ_THRESHOLD(X) ((X) << SDHOST_EDM_READ_THRESHOLD_SHIFT)
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#define SDHOST_EDM_WRITE_THRESHOLD(X) ((X) << SDHOST_EDM_WRITE_THRESHOLD_SHIFT)
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#define CMD8_SD_ARG (0x0UL << 12 | BIT8 | 0xCEUL << 0)
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#define CMD8_MMC_ARG (0)
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#endif /*__BCM2836_SDHOST_H__ */
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