## @file
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# Instance of PCI Express Library using the 256 MB PCI Express MMIO window.
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#
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# PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
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# PCI Configuration cycles. Layers on top of an I/O Library instance.
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#
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# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
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#
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# This library is inherited from MdePkg/Library/BasePciExpressLib. On
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# NeoverseN1 SoC, with the unmodified version of this library, a slave error is
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# generated when host accesses the config space of a non-available device or
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# unimplemented function on a given bus. In order to resolve this for
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# NeoverseN1 SoC, a modified version of the MdePkg/Library/BasePciExpressLib
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# library is used. The modification includes a check to determine whether the
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# incoming PCI address can be safely accessed.
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#
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# In addition to this, the NeoverseN1 SoC has two other limitations which
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# affect the access to the PCIe root port:
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# 1. ECAM space is not contiguous, root port ECAM (BDF = 0:0:0) is isolated
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# from rest of the downstream hierarchy ECAM space.
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# 2. Root port ECAM space is not capable of 8bit/16bit writes.
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# This library includes workaround for these limitations as well.
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#
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# Copyright (c) 2020, ARM Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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INF_VERSION = 0x0001001A
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BASE_NAME = BasePciExpressLib
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FILE_GUID = b378dd06-de7f-4e8c-8fb0-5126adfb34bf
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = PciExpressLib
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[Sources]
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PciExpressLib.c
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[Packages]
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MdePkg/MdePkg.dec
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Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
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[FixedPcd]
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gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseAddress
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gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseSize
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[LibraryClasses]
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BaseLib
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DebugLib
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IoLib
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PcdLib
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[Pcd]
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gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES
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