/** @file
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*
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* Copyright 2019-2020 NXP
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Library/ArmLib.h>
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#include <Library/ArmPlatformLib.h>
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#include <Library/GpioLib.h>
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#include <Library/SocLib.h>
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#include <Ppi/ArmMpCoreInfo.h>
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#include <Ppi/NxpPlatformGetClock.h>
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/**
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Documents use bit number as per Power PC notation,
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so need to convert it to support ARMv8 architecture
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**/
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#define USB2_MUX_SEL_GPIO (31 - 23)
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ARM_CORE_INFO mLS1046aMpCoreInfoTable[] = {
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{
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// Cluster 0, Core 0
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0x0, 0x0,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)0,
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(EFI_PHYSICAL_ADDRESS)0,
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(EFI_PHYSICAL_ADDRESS)0,
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(UINT64)0xFFFFFFFF
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}
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};
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/**
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Return the current Boot Mode
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This function returns the boot reason on the platform
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**/
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EFI_BOOT_MODE
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ArmPlatformGetBootMode (
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VOID
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)
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{
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return BOOT_WITH_FULL_CONFIGURATION;
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}
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/**
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Get the clocks supplied by Platform(Board) to NXP Layerscape SOC IPs
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@param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP clock
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is to be retrieved.
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@param[in] ... Variable argument list which is parsed based on
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ClockType. e.g. if the ClockType is NXP_I2C_CLOCK, then
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the second argument will be interpreted as controller
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number.
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if ClockType is NXP_CORE_CLOCK, then second argument
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is interpreted as cluster number and third argument is
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interpreted as core number (within the cluster)
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@return Actual Clock Frequency. Return value 0 should be
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interpreted as clock not being provided to IP.
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**/
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UINT64
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EFIAPI
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NxpPlatformGetClock(
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IN UINT32 ClockType,
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...
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)
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{
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UINT64 Clock;
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VA_LIST Args;
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Clock = 0;
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VA_START (Args, ClockType);
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switch (ClockType) {
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case NXP_SYSTEM_CLOCK:
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Clock = 100 * 1000 * 1000; // 100 MHz
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break;
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case NXP_I2C_CLOCK:
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case NXP_UART_CLOCK:
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Clock = NxpPlatformGetClock (NXP_SYSTEM_CLOCK);
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Clock = SocGetClock (Clock, ClockType, Args);
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break;
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default:
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break;
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}
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VA_END (Args);
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return Clock;
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}
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/**
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FRWY-LS1046A GPIO 23 use for USB2
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mux seclection
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**/
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STATIC VOID MuxSelectUsb2 (VOID)
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{
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GpioSetDirection (GPIO3, USB2_MUX_SEL_GPIO, OUTPUT);
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GpioSetData (GPIO3, USB2_MUX_SEL_GPIO, HIGH);
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return;
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}
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/**
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Initialize controllers that must setup in the normal world
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This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
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in the PEI phase.
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**/
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EFI_STATUS
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ArmPlatformInitialize (
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IN UINTN MpId
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)
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{
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SocInit ();
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MuxSelectUsb2 ();
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return EFI_SUCCESS;
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}
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EFI_STATUS
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PrePeiCoreGetMpCoreInfo (
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OUT UINTN *CoreCount,
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OUT ARM_CORE_INFO **ArmCoreTable
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)
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{
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if (ArmIsMpCore()) {
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*CoreCount = sizeof(mLS1046aMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
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*ArmCoreTable = mLS1046aMpCoreInfoTable;
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return EFI_SUCCESS;
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} else {
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return EFI_UNSUPPORTED;
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}
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}
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ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
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NXP_PLATFORM_GET_CLOCK_PPI gPlatformGetClockPpi = { NxpPlatformGetClock };
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EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
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{
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EFI_PEI_PPI_DESCRIPTOR_PPI,
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&gArmMpCoreInfoPpiGuid,
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&mMpCoreInfoPpi
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}
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};
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VOID
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ArmPlatformGetPlatformPpiList (
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OUT UINTN *PpiListSize,
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OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
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)
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{
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if (ArmIsMpCore()) {
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*PpiListSize = sizeof(gPlatformPpiTable);
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*PpiList = gPlatformPpiTable;
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} else {
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*PpiListSize = 0;
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*PpiList = NULL;
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}
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}
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