/**
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*
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* Copyright (c) 2017, Linaro Ltd. All rights reserved.
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* Copyright (c) 2019, Marvell International Ltd. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Uefi.h>
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#include <Library/DebugLib.h>
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#include <Library/DevicePathLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/MvGpioLib.h>
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#include <Library/NonDiscoverableDeviceRegistrationLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Protocol/NonDiscoverableDevice.h>
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#include "NonDiscoverableInitLib.h"
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STATIC
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EFI_STATUS
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EFIAPI
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ConfigurePins (
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IN CONST MV_GPIO_PIN *VbusPin,
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IN UINTN PinCount,
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IN MV_GPIO_DRIVER_TYPE DriverType
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)
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{
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EMBEDDED_GPIO_MODE Mode;
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EMBEDDED_GPIO_PIN Gpio;
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EMBEDDED_GPIO *GpioProtocol;
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EFI_STATUS Status;
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UINTN Index;
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Status = MvGpioGetProtocol (DriverType, &GpioProtocol);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: Unable to find GPIO protocol\n", __FUNCTION__));
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return Status;
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}
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for (Index = 0; Index < PinCount; Index++) {
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Mode = VbusPin->ActiveHigh ? GPIO_MODE_OUTPUT_1 : GPIO_MODE_OUTPUT_0;
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Gpio = GPIO (VbusPin->ControllerId, VbusPin->PinNumber);
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GpioProtocol->Set (GpioProtocol, Gpio, Mode);
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VbusPin++;
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}
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return EFI_SUCCESS;
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}
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STATIC CONST MV_GPIO_PIN mCp0XhciVbusPins[] = {
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{
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MV_GPIO_DRIVER_TYPE_PCA95XX,
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CN9130_DB_IO_EXPANDER0,
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CN9130_DB_VBUS0_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_PCA95XX,
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CN9130_DB_IO_EXPANDER0,
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CN9130_DB_VBUS0_LIMIT_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_PCA95XX,
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CN9130_DB_IO_EXPANDER0,
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CN9130_DB_VBUS1_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_PCA95XX,
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CN9130_DB_IO_EXPANDER0,
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CN9130_DB_VBUS1_LIMIT_PIN,
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TRUE,
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},
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};
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STATIC
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EFI_STATUS
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EFIAPI
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Cp0XhciInit (
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IN NON_DISCOVERABLE_DEVICE *This
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)
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{
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return ConfigurePins (mCp0XhciVbusPins,
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ARRAY_SIZE (mCp0XhciVbusPins),
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MV_GPIO_DRIVER_TYPE_PCA95XX);
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}
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STATIC CONST MV_GPIO_PIN mCp1XhciVbusPins[] = {
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{
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
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MV_GPIO_CP1_CONTROLLER0,
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CN9131_DB_VBUS0_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
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MV_GPIO_CP1_CONTROLLER0,
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CN9131_DB_VBUS0_LIMIT_PIN,
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TRUE,
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},
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};
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STATIC
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EFI_STATUS
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EFIAPI
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Cp1XhciInit (
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IN NON_DISCOVERABLE_DEVICE *This
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)
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{
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return ConfigurePins (mCp1XhciVbusPins,
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ARRAY_SIZE (mCp1XhciVbusPins),
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER);
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}
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STATIC CONST MV_GPIO_PIN mCp2XhciVbusPins[] = {
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{
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
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MV_GPIO_CP2_CONTROLLER0,
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CN9132_DB_VBUS0_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
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MV_GPIO_CP2_CONTROLLER0,
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CN9132_DB_VBUS0_LIMIT_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
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MV_GPIO_CP2_CONTROLLER0,
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CN9132_DB_VBUS1_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER,
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MV_GPIO_CP2_CONTROLLER0,
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CN9132_DB_VBUS1_LIMIT_PIN,
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TRUE,
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},
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};
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STATIC
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EFI_STATUS
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EFIAPI
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Cp2XhciInit (
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IN NON_DISCOVERABLE_DEVICE *This
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)
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{
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return ConfigurePins (mCp2XhciVbusPins,
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ARRAY_SIZE (mCp2XhciVbusPins),
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MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER);
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}
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STATIC CONST MV_GPIO_PIN mApSdMmcPins[] = {
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{
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MV_GPIO_DRIVER_TYPE_PCA95XX,
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CN9130_DB_IO_EXPANDER0,
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CN9130_DB_AP_MMC_VCCQ_PIN,
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TRUE,
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},
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};
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STATIC
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EFI_STATUS
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EFIAPI
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ApSdMmcInit (
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IN NON_DISCOVERABLE_DEVICE *This
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)
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{
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return ConfigurePins (mApSdMmcPins,
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ARRAY_SIZE (mApSdMmcPins),
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MV_GPIO_DRIVER_TYPE_PCA95XX);
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}
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STATIC CONST MV_GPIO_PIN mCp0SdMmcPins[] = {
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{
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MV_GPIO_DRIVER_TYPE_PCA95XX,
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CN9130_DB_IO_EXPANDER0,
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CN9130_DB_SDMMC_VCC_PIN,
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TRUE,
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},
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{
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MV_GPIO_DRIVER_TYPE_PCA95XX,
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CN9130_DB_IO_EXPANDER0,
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CN9130_DB_SDMMC_VCCQ_PIN,
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FALSE,
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},
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};
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STATIC
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EFI_STATUS
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EFIAPI
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Cp0SdMmcInit (
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IN NON_DISCOVERABLE_DEVICE *This
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)
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{
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return ConfigurePins (mCp0SdMmcPins,
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ARRAY_SIZE (mCp0SdMmcPins),
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MV_GPIO_DRIVER_TYPE_PCA95XX);
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}
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NON_DISCOVERABLE_DEVICE_INIT
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EFIAPI
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NonDiscoverableDeviceInitializerGet (
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IN NON_DISCOVERABLE_DEVICE_TYPE Type,
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IN UINTN Index
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)
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{
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if (Type == NonDiscoverableDeviceTypeXhci) {
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switch (Index) {
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case 0:
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case 1:
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return Cp0XhciInit;
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case 2:
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return Cp1XhciInit;
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case 3:
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case 4:
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return Cp2XhciInit;
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}
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}
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if (Type == NonDiscoverableDeviceTypeSdhci) {
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switch (Index) {
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case 0:
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return ApSdMmcInit;
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case 1:
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return Cp0SdMmcInit;
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}
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}
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return NULL;
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}
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