/**
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*
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* Copyright (C) 2019, Marvell International Ltd. and its affiliates.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Uefi.h>
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#include <Library/ArmadaBoardDescLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/MvGpioLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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//
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// General purpose routine for per-board initalization
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//
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EFI_STATUS
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ArmadaBoardInit (
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VOID
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)
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{
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return EFI_SUCCESS;
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}
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//
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// GPIO Expander
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//
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STATIC MV_GPIO_EXPANDER mGpioExpander = {
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PCA9555_ID,
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0x21,
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0x0,
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};
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EFI_STATUS
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EFIAPI
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ArmadaBoardGpioExpanderGet (
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IN OUT MV_GPIO_EXPANDER **GpioExpanders,
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IN OUT UINTN *GpioExpanderCount
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)
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{
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*GpioExpanderCount = 1;
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*GpioExpanders = &mGpioExpander;
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return EFI_SUCCESS;
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}
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//
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// PCIE
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//
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STATIC
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MV_PCIE_CONTROLLER mPcieController[] = {
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{ /* PCIE0 @0xF2640000 */
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.PcieDbiAddress = 0xF2600000,
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.ConfigSpaceAddress = 0xD0000000,
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.HaveResetGpio = FALSE,
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.PcieResetGpio = { 0 },
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.PcieBusMin = 0,
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.PcieBusMax = 0xFE,
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.PcieIoTranslation = 0xDFF00000,
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.PcieIoWinBase = 0x0,
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.PcieIoWinSize = 0x10000,
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.PcieMmio32Translation = 0,
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.PcieMmio32WinBase = 0xC0000000,
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.PcieMmio32WinSize = 0x10000000,
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.PcieMmio64Translation = 0,
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.PcieMmio64WinBase = MAX_UINT64,
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.PcieMmio64WinSize = 0,
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}
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};
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/**
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Return the number and description of PCIE controllers used on the platform.
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@param[in out] **PcieControllers Array containing PCIE controllers'
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description.
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@param[in out] *PcieControllerCount Amount of used PCIE controllers.
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@retval EFI_SUCCESS The data were obtained successfully.
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@retval other Return error status.
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**/
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EFI_STATUS
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EFIAPI
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ArmadaBoardPcieControllerGet (
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IN OUT MV_PCIE_CONTROLLER CONST **PcieControllers,
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IN OUT UINTN *PcieControllerCount
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)
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{
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*PcieControllers = mPcieController;
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*PcieControllerCount = ARRAY_SIZE (mPcieController);
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return EFI_SUCCESS;
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}
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//
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// Order of devices in SdMmcDescTemplate has to be in par with ArmadaSoCDescLib
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//
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STATIC
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MV_BOARD_SDMMC_DESC mSdMmcDescTemplate[] = {
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{ /* eMMC 0xF06E0000 */
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0, /* SOC will be filled by MvBoardDescDxe */
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0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
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TRUE, /* Xenon1v8Enabled */
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/*
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* Force 4-bit bus width - work-around for non
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* functional HS400 mode.
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*/
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FALSE, /* Xenon8BitBusEnabled */
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FALSE, /* XenonSlowModeEnabled */
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0x40, /* XenonTuningStepDivisor */
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EmbeddedSlot /* SlotType */
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},
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{ /* SD/MMC 0xF2780000 */
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0, /* SOC will be filled by MvBoardDescDxe */
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0, /* SdMmcDevCount will be filled by MvBoardDescDxe */
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FALSE, /* Xenon1v8Enabled */
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FALSE, /* Xenon8BitBusEnabled */
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FALSE, /* XenonSlowModeEnabled */
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0x19, /* XenonTuningStepDivisor */
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EmbeddedSlot /* SlotType */
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}
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};
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EFI_STATUS
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EFIAPI
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ArmadaBoardDescSdMmcGet (
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OUT UINTN *SdMmcDevCount,
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OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
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)
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{
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*SdMmcDesc = mSdMmcDescTemplate;
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*SdMmcDevCount = ARRAY_SIZE (mSdMmcDescTemplate);
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return EFI_SUCCESS;
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}
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