/** @file
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Slot Table Update.
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@copyright
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Copyright 2018 - 2021 Intel Corporation. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "PeiBoardInit.h"
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#include <Library/UbaSlotUpdateLib.h>
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#include <IioPlatformData.h>
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#define PCI_DEVICE_ON_BOARD_TRUE 0
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#define PCI_DEVICE_ON_BOARD_FALSE 1
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typedef enum {
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Iio_Socket0 = 0,
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Iio_Socket1,
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Iio_Socket2,
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Iio_Socket3,
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Iio_Socket4,
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Iio_Socket5,
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Iio_Socket6,
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Iio_Socket7
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} IIO_SOCKETS;
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typedef enum {
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Iio_Iou0 =0,
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Iio_Iou1,
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Iio_Iou2,
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Iio_Mcp0,
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Iio_Mcp1,
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Iio_IouMax
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} IIO_IOUS;
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typedef enum {
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Bw5_Addr_0 = 0,
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Bw5_Addr_1,
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Bw5_Addr_2,
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Bw5_Addr_3,
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Bw5_Addr_Max
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} BW5_ADDRESS;
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static UINT8 TypeCooperCityRPPchPciSlotImpementedTableData[] = {
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 0
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 1
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 2
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 3
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PCI_DEVICE_ON_BOARD_TRUE, // Root Port 4
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PCI_DEVICE_ON_BOARD_TRUE, // Root Port 5
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 6
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 7
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 8
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 9
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 10
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 11
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 12
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 13
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 14
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 15
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 16
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 17
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PCI_DEVICE_ON_BOARD_FALSE, // Root Port 18
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PCI_DEVICE_ON_BOARD_FALSE // Root Port 19
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};
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UINT8
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GetTypeCooperCityRPIOU0Setting (
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UINT8 IOU0Data
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)
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{
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//
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// Change bifurcation of Port1C-1D as x4x4 when QATGpio enabled.
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//
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IOU0Data = IIO_BIFURCATE_x4x4xxx8;
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return IOU0Data;
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}
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UINT8
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GetTypeCooperCityRPIOU2Setting (
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UINT8 SkuPersonalityType,
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UINT8 IOU2Data
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)
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{
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return IOU2Data;
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}
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PLATFORM_SLOT_UPDATE_TABLE TypeCooperCityRPSlotTable =
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{
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PLATFORM_SLOT_UPDATE_SIGNATURE,
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PLATFORM_SLOT_UPDATE_VERSION,
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NULL,
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GetTypeCooperCityRPIOU0Setting,
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1
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};
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PLATFORM_SLOT_UPDATE_TABLE2 TypeCooperCityRPSlotTable2 =
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{
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PLATFORM_SLOT_UPDATE_SIGNATURE,
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PLATFORM_SLOT_UPDATE_VERSION,
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NULL,
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GetTypeCooperCityRPIOU0Setting,
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1,
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GetTypeCooperCityRPIOU2Setting
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};
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PLATFORM_PCH_PCI_SLOT_IMPLEMENTED_UPDATE_TABLE TypeCooperCityRPPchPciSlotImplementedTable = {
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PLATFORM_SLOT_UPDATE_SIGNATURE,
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PLATFORM_SLOT_UPDATE_VERSION,
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TypeCooperCityRPPchPciSlotImpementedTableData
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};
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/**
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Entry point function for the PEIM
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@param FileHandle Handle of the file being invoked.
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@param PeiServices Describes the list of possible PEI Services.
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@return EFI_SUCCESS If we installed our PPI
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**/
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EFI_STATUS
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TypeCooperCityRPInstallSlotTableData (
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IN UBA_CONFIG_DATABASE_PPI *UbaConfigPpi
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)
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{
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EFI_STATUS Status;
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Status = UbaConfigPpi->AddData (
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UbaConfigPpi,
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&gPlatformSlotDataGuid,
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&TypeCooperCityRPSlotTable,
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sizeof(TypeCooperCityRPSlotTable)
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);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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Status = UbaConfigPpi->AddData (
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UbaConfigPpi,
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&gPlatformSlotDataGuid2,
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&TypeCooperCityRPSlotTable2,
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sizeof(TypeCooperCityRPSlotTable2)
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);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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Status = UbaConfigPpi->AddData (
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UbaConfigPpi,
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&gPlatformPciSlotImplementedGuid,
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&TypeCooperCityRPPchPciSlotImplementedTable,
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sizeof(TypeCooperCityRPPchPciSlotImplementedTable)
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);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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return Status;
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}
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