/** @file
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Sample to provide SecTemporaryRamDone function.
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@copyright
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Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiPei.h>
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#include <Ppi/TemporaryRamDone.h>
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#include <Ppi/PlatformInitTempRamExitPpi.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/FspWrapperPlatformLib.h>
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#include <Library/FspWrapperApiLib.h>
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#include <Library/PeiServicesTablePointerLib.h>
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#include <Guid/FspHeaderFile.h>
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#include <Register/ArchitecturalMsr.h>
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#define MSR_NEM 0x000002E0
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/**
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This interface disables temporary memory in SEC Phase.
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This is for dispatch mode use. We should properly produce the FSP_TEMP_RAM_EXIT_PPI and then call
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that instead, but the FSP does not produce that PPI
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**/
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VOID
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EFIAPI
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SecPlatformDisableTemporaryMemoryDispatchHack (
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VOID
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)
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{
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UINT64 MsrValue;
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UINT64 MtrrDefaultType;
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MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;
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//
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// Force and INVD.
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//
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AsmInvd ();
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//
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// Disable MTRRs.
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//
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DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
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MtrrDefaultType = DefType.Uint64;
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DefType.Bits.E = 0;
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AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);
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//
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// Force and INVD to prevent MCA error.
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//
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AsmInvd ();
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//
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// Clear NEM Run and NEM Setup bits individually.
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//
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MsrValue = AsmReadMsr64 (MSR_NEM);
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MsrValue &= ~((UINT64) BIT1);
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AsmWriteMsr64 (MSR_NEM, MsrValue);
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MsrValue &= ~((UINT64) BIT0);
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AsmWriteMsr64 (MSR_NEM, MsrValue);
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//
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// Restore MTRR default setting
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//
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AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, MtrrDefaultType);
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}
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/**
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This interface disables temporary memory in SEC Phase.
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**/
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VOID
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EFIAPI
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SecPlatformDisableTemporaryMemory (
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VOID
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)
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{
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EFI_STATUS Status;
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VOID *TempRamExitParam;
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CONST EFI_PEI_SERVICES **PeiServices;
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PLATFORM_INIT_TEMP_RAM_EXIT_PPI *PlatformInitTempRamExitPpi;
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DEBUG ((DEBUG_INFO, "SecPlatformDisableTemporaryMemory enter\n"));
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PeiServices = GetPeiServicesTablePointer ();
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ASSERT (PeiServices != NULL);
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if (PeiServices == NULL) {
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return ;
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}
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ASSERT ((*PeiServices) != NULL);
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if ((*PeiServices) == NULL) {
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return;
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}
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Status = (*PeiServices)->LocatePpi (
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PeiServices,
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&gPlatformInitTempRamExitPpiGuid,
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0,
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NULL,
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(VOID **) &PlatformInitTempRamExitPpi
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);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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return;
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}
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Status = PlatformInitTempRamExitPpi->PlatformInitBeforeTempRamExit ();
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ASSERT_EFI_ERROR (Status);
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if (PcdGet8 (PcdFspModeSelection) == 1) {
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//
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// FSP API mode
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//
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TempRamExitParam = UpdateTempRamExitParam ();
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Status = CallTempRamExit (TempRamExitParam);
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DEBUG ((DEBUG_INFO, "TempRamExit status: 0x%x\n", Status));
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ASSERT_EFI_ERROR (Status);
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} else {
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SecPlatformDisableTemporaryMemoryDispatchHack ();
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}
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Status = PlatformInitTempRamExitPpi->PlatformInitAfterTempRamExit ();
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ASSERT_EFI_ERROR(Status);
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return ;
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}
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