1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
| /** @file
|
| @copyright
| Copyright 1999 - 2021 Intel Corporation. <BR>
|
| SPDX-License-Identifier: BSD-2-Clause-Patent
| **/
|
| #ifndef _PCI_HOST_RESOURCE_H_
| #define _PCI_HOST_RESOURCE_H_
|
| #include <PiDxe.h>
| #include <UncoreCommonIncludes.h>
|
| #define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFF
| #define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFE
|
| typedef struct {
| UINTN BusBase;
| UINTN BusLimit;
| UINTN BusReserve;
|
| UINT32 Mem32Base;
| UINT32 Mem32Limit;
|
| UINT64 Mem64Base;
| UINT64 Mem64Limit;
|
| UINTN IoBase;
| UINTN IoLimit;
| } PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
|
| typedef enum {
| TypeIo = 0,
| TypeMem32,
| TypePMem32,
| TypeMem64,
| TypePMem64,
| TypeBus,
| TypeMax
| } PCI_RESOURCE_TYPE;
|
| typedef enum {
| ResNone,
| ResSubmitted,
| ResRequested,
| ResAllocated,
| ResStatusMax
| } RES_STATUS;
|
| typedef struct {
| PCI_RESOURCE_TYPE Type;
| //
| // Base is a host address
| //
| UINT64 Base;
| UINT64 Length;
| UINT64 Alignment;
| RES_STATUS Status;
| } PCI_RES_NODE;
|
| #endif // _PCI_HOST_RESOURCE_H_
|
|