## @file
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#
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# Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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!include OpenBoardPkg.fdf.inc
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#
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# Build the variable store and the firmware code as one unified flash device
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# image.
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#
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[FD.BOARDX58ICH10]
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BaseAddress = $(FW_BASE_ADDRESS)
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Size = $(FW_SIZE)
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ErasePolarity = 1
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BlockSize = $(BLOCK_SIZE)
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NumBlocks = $(FW_BLOCKS)
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!include VarStore.fdf.inc
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$(VARS_SIZE)|0x00002000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
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#NV_FTW_WORKING
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DATA = {
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# EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
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# { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
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0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
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0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,
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# Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
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0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
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# WriteQueueSize: UINT64
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0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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}
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0x00040000|0x00040000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
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#NV_FTW_SPARE
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0x00080000|0x0016C000
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FV = FVMAIN_COMPACT
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$(SECFV_OFFSET)|$(SECFV_SIZE)
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FV = FvTempMemorySilicon
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#
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# Build the variable store and the firmware code as separate flash device
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# images.
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#
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[FD.SIMICS_VARS]
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BaseAddress = $(FW_BASE_ADDRESS)
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Size = 0x80000
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ErasePolarity = 1
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BlockSize = $(BLOCK_SIZE)
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NumBlocks = 0x80
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!include VarStore.fdf.inc
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[FD.SIMICS_CODE]
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BaseAddress = $(CODE_BASE_ADDRESS)
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Size = $(CODE_SIZE)
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ErasePolarity = 1
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BlockSize = $(BLOCK_SIZE)
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NumBlocks = $(CODE_BLOCKS)
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0x00000000|0x0016C000
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FV = FVMAIN_COMPACT
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0x0016C000|$(SECFV_SIZE)
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FV = FvTempMemorySilicon
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[FD.MEMFD]
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BaseAddress = $(MEMFD_BASE_ADDRESS)
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Size = 0xB00000
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ErasePolarity = 1
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BlockSize = 0x10000
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NumBlocks = 0xB0
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0x000000|0x006000
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gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize
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0x006000|0x001000
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gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize
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0x007000|0x001000
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gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gSimicsOpenBoardPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
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0x010000|0x008000
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gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize
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0x020000|0x0E0000
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gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize
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FV = FvPreMemory
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0x100000|0xA00000
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gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase|gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize
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FV = DXEFV
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################################################################################
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[FV.FvTempMemorySilicon]
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FvAlignment = 16
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FvForceRebase = TRUE
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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FvNameGuid = 229EEDCE-8E76-4809-B233-EC36BFBF6989
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INF RuleOverride=RESET_SECMAIN USE = IA32 $(BOARD_PKG)/SecCore/SecMain.inf
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!include $(SKT_PKG)/SktSecInclude.fdf
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[FV.FvPreMemory]
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FvAlignment = 16
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FvForceRebase = TRUE
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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FvNameGuid = 6522280D-28F9-4131-ADC4-F40EBFA45864
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##
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# PEI Apriori file example, more PEIM module added later.
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##
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INF MdeModulePkg/Core/Pei/PeiMain.inf
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!include $(SKT_PKG)/SktPreMemoryInclude.fdf
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!include $(PCH_PKG)/IchPreMemoryInclude.fdf
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!include MinPlatformPkg/Include/Fdf/CorePreMemoryInclude.fdf
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INF MinPlatformPkg/PlatformInit/ReportFv/ReportFvPei.inf
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INF MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
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INF MinPlatformPkg/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf
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!include MinPlatformPkg/Include/Fdf/CoreSecurityPreMemoryInclude.fdf
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!include AdvancedFeaturePkg/Include/PreMemory.fdf
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INF $(BOARD_PKG)/SimicsPei/SimicsPei.inf
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!include $(SKT_PKG)/SktPostMemoryInclude.fdf
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!include $(PCH_PKG)/IchPostMemoryInclude.fdf
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!include MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf
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INF MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf
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INF MinPlatformPkg/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMem.inf
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!include MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf
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INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
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INF $(SKT_PKG)/Smm/Access/SmmAccessPei.inf
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# S3 SMM PEI driver
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#INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
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[FV.DXEFV]
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FvNameGuid = EACAB9EA-C3C6-4438-8FD7-2270826DC0BB
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BlockSize = 0x10000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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!include MinPlatformPkg/Include/Fdf/CoreUefiBootInclude.fdf
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!include $(SKT_PKG)/SktUefiBootInclude.fdf
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!include $(PCH_PKG)/IchUefiBootInclude.fdf
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INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
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INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
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INF UefiCpuPkg/CpuDxe/CpuDxe.inf
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!include MinPlatformPkg/Include/Fdf/CoreOsBootInclude.fdf
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!include AdvancedFeaturePkg/Include/PostMemory.fdf
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INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
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INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
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INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
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INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
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INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
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INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
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INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
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INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
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INF MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
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INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
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INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
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INF BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.inf
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INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
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INF $(BOARD_PKG)/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
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INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
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INF $(BOARD_PKG)/AcpiTables/MinPlatformAcpiTables/AcpiPlatform.inf
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INF RuleOverride=ACPITABLE $(BOARD_PKG)/AcpiTables/AcpiTables.inf
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INF $(BOARD_PKG)/SimicsVideoDxe/SimicsVideoDxe.inf
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INF MinPlatformPkg/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
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INF MinPlatformPkg/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
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INF $(BOARD_PKG)/SimicsDxe/SimicsDxe.inf
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FILE FREEFORM = 7BB28B99-61BB-11D5-9A5D-0090273FC14D {
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SECTION RAW = $(BOARD_PKG)/Logo/Logo.bmp
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}
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INF ShellPkg/Application/Shell/Shell.inf
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#
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# Network modules
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#
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INF SimicsIch10BinPkg/UndiBinary/UndiDxe.inf
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!include MinPlatformPkg/Include/Fdf/CoreSecurityLateInclude.fdf
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[FV.FVMAIN_COMPACT]
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FvNameGuid = 6189987A-DDA6-4060-B313-49168DA9BD46
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
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SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
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#
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# These firmware volumes will have files placed in them uncompressed,
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# and then both firmware volumes will be compressed in a single
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# compression operation in order to achieve better overall compression.
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#
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SECTION FV_IMAGE = FvPreMemory
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SECTION FV_IMAGE = DXEFV
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}
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}
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!include DecomprScratchEnd.fdf.inc
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################################################################################
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#
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# Rules are use with the [FV] section's module INF type to define
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# how an FFS file is created for a given INF file. The following Rule are the default
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# rules for the different module type. User can add the customized rules to define the
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# content of the FFS file.
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#
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################################################################################
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!include MinPlatformPkg/Include/Fdf/RuleInclude.fdf
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[Rule.Common.SEC.RESET_VECTOR]
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FILE RAW = $(NAMED_GUID) {
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RAW BIN Align = 16 |.bin
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}
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[Rule.Common.SEC.RESET_SECMAIN]
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FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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PE32 PE32 Align = 16 $(INF_OUTPUT)/$(MODULE_NAME).efi
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}
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