/** @file
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Principle source module for Clanton Peak platform config PEIM driver.
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Copyright (c) 2013 Intel Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiPei.h>
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#include <Library/IntelQNCLib.h>
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#include <Library/PlatformHelperLib.h>
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#include <Library/QNCAccessLib.h>
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VOID
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EFIAPI
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LegacySpiProtect (
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VOID
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)
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{
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UINT32 RegVal;
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RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange0Pei);
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if (RegVal != 0) {
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PlatformWriteFirstFreeSpiProtect (
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RegVal,
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0,
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0
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);
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}
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RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange1Pei);
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if (RegVal != 0) {
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PlatformWriteFirstFreeSpiProtect (
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RegVal,
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0,
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0
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);
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}
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RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange2Pei);
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if (RegVal != 0) {
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PlatformWriteFirstFreeSpiProtect (
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RegVal,
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0,
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0
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);
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}
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//
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// Make legacy SPI READ/WRITE enabled if not a secure build
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//
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LpcPciCfg32And (R_QNC_LPC_BIOS_CNTL, ~B_QNC_LPC_BIOS_CNTL_BIOSWE);
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}
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/** PlatformConfigPei driver entry point.
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Platform config in PEI stage.
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@param[in] FfsHeader Pointer to Firmware File System file header.
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@param[in] PeiServices General purpose services available to every PEIM.
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@retval EFI_SUCCESS Platform config success.
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*/
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EFI_STATUS
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EFIAPI
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PlatformConfigPeiInit (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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//
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// Do SOC Init Pre memory init.
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//
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PeiQNCPreMemInit ();
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//
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// Protect areas specified by PCDs.
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//
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LegacySpiProtect ();
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return EFI_SUCCESS;
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}
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