/** @file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Uefi.h>
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#include <PiSmm.h>
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#include <Library/TestPointCheckLib.h>
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#include <Library/TestPointLib.h>
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#include <Library/DebugLib.h>
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#include <Library/SmmServicesTableLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Guid/MemoryAttributesTable.h>
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#include <Register/SmramSaveStateMap.h>
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#include <Register/StmApi.h>
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#include <Register/Msr.h>
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#define NEXT_MEMORY_DESCRIPTOR(MemoryDescriptor, Size) \
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((EFI_MEMORY_DESCRIPTOR *)((UINT8 *)(MemoryDescriptor) + (Size)))
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///
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/// Page Table Entry
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///
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#define IA32_PG_P BIT0
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#define IA32_PG_RW BIT1
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#define IA32_PG_U BIT2
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#define IA32_PG_WT BIT3
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#define IA32_PG_CD BIT4
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#define IA32_PG_A BIT5
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#define IA32_PG_D BIT6
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#define IA32_PG_PS BIT7
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#define IA32_PG_PAT_2M BIT12
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#define IA32_PG_PAT_4K IA32_PG_PS
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#define IA32_PG_PMNT BIT62
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#define IA32_PG_NX BIT63
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#define PAGING_4K_MASK 0xFFF
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#define PAGING_2M_MASK 0x1FFFFF
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#define PAGING_1G_MASK 0x3FFFFFFF
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#define PAGING_PAE_INDEX_MASK 0x1FF
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#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
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#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
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#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
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typedef enum {
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PageNone,
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Page4K,
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Page2M,
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Page1G,
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} PAGE_ATTRIBUTE;
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typedef struct {
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PAGE_ATTRIBUTE Attribute;
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UINT64 Length;
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UINT64 AddressMask;
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} PAGE_ATTRIBUTE_TABLE;
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PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
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{Page4K, SIZE_4KB, PAGING_4K_ADDRESS_MASK_64},
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{Page2M, SIZE_2MB, PAGING_2M_ADDRESS_MASK_64},
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{Page1G, SIZE_1GB, PAGING_1G_ADDRESS_MASK_64},
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};
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EFI_STATUS
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EFIAPI
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SmmGetSystemConfigurationTable (
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IN EFI_GUID *TableGuid,
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OUT VOID **Table
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);
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/**
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Return page table base.
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@return page table base.
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**/
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UINTN
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GetPageTableBase (
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VOID
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)
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{
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return (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
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}
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/**
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Return length according to page attributes.
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@param[in] PageAttributes The page attribute of the page entry.
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@return The length of page entry.
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**/
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UINTN
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PageAttributeToLength (
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IN PAGE_ATTRIBUTE PageAttribute
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)
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{
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UINTN Index;
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for (Index = 0; Index < sizeof(mPageAttributeTable)/sizeof(mPageAttributeTable[0]); Index++) {
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if (PageAttribute == mPageAttributeTable[Index].Attribute) {
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return (UINTN)mPageAttributeTable[Index].Length;
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}
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}
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return 0;
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}
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/**
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Return page table entry to match the address.
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@param[in] Address The address to be checked.
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@param[out] PageAttributes The page attribute of the page entry.
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@return The page entry.
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**/
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VOID *
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GetPageTableEntry (
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IN PHYSICAL_ADDRESS Address,
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OUT PAGE_ATTRIBUTE *PageAttribute
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)
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{
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UINTN Index1;
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UINTN Index2;
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UINTN Index3;
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UINTN Index4;
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UINT64 *L1PageTable;
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UINT64 *L2PageTable;
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UINT64 *L3PageTable;
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UINT64 *L4PageTable;
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Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_PAE_INDEX_MASK;
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Index3 = ((UINTN)Address >> 30) & PAGING_PAE_INDEX_MASK;
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Index2 = ((UINTN)Address >> 21) & PAGING_PAE_INDEX_MASK;
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Index1 = ((UINTN)Address >> 12) & PAGING_PAE_INDEX_MASK;
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if (sizeof(UINTN) == sizeof(UINT64)) {
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L4PageTable = (UINT64 *)GetPageTableBase ();
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if (L4PageTable[Index4] == 0) {
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*PageAttribute = Page1G;
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return NULL;
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}
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L3PageTable = (UINT64 *)(UINTN)(L4PageTable[Index4] & PAGING_4K_ADDRESS_MASK_64);
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} else {
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L3PageTable = (UINT64 *)GetPageTableBase ();
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}
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if (L3PageTable[Index3] == 0) {
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*PageAttribute = Page1G;
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return NULL;
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}
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if ((L3PageTable[Index3] & IA32_PG_PS) != 0) {
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// 1G
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*PageAttribute = Page1G;
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return &L3PageTable[Index3];
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}
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L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & PAGING_4K_ADDRESS_MASK_64);
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if (L2PageTable[Index2] == 0) {
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*PageAttribute = Page2M;
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return NULL;
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}
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if ((L2PageTable[Index2] & IA32_PG_PS) != 0) {
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// 2M
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*PageAttribute = Page2M;
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return &L2PageTable[Index2];
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}
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// 4k
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L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & PAGING_4K_ADDRESS_MASK_64);
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if ((L1PageTable[Index1] == 0) && (Address != 0)) {
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*PageAttribute = Page4K;
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return NULL;
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}
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*PageAttribute = Page4K;
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return &L1PageTable[Index1];
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}
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typedef struct {
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volatile BOOLEAN Valid;
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volatile UINT64 SmBase;
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} SMBASE_SHARED_BUFFER;
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VOID
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EFIAPI
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GetSmBaseOnCurrentProcessor (
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IN OUT VOID *Buffer
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)
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{
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SMBASE_SHARED_BUFFER *SmBaseBuffer;
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SmBaseBuffer = Buffer;
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SmBaseBuffer->SmBase = AsmReadMsr64 (MSR_IA32_SMBASE);
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SmBaseBuffer->Valid = TRUE;
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}
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UINT64 *mSmBaseBuffer;
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VOID
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SetupSmBaseBuffer (
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VOID
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)
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{
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volatile SMBASE_SHARED_BUFFER SmBaseBuffer;
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EFI_STATUS Status;
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UINTN Index;
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UINTN Base = 0;
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UINTN Delta = 0;
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if (mSmBaseBuffer != NULL) {
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return ;
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}
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mSmBaseBuffer = AllocatePool (sizeof(UINT64) * gSmst->NumberOfCpus);
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ASSERT(mSmBaseBuffer != NULL);
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for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
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ZeroMem ((VOID *)&SmBaseBuffer, sizeof(SmBaseBuffer));
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if (Index == gSmst->CurrentlyExecutingCpu) {
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GetSmBaseOnCurrentProcessor ((VOID *)&SmBaseBuffer);
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DEBUG ((DEBUG_INFO, "SmbaseBsp(%d) - 0x%x\n", Index, SmBaseBuffer.SmBase));
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} else {
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Status = gSmst->SmmStartupThisAp (GetSmBaseOnCurrentProcessor, Index, (VOID *)&SmBaseBuffer);
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if (!FeaturePcdGet (PcdCpuHotPlugSupport)) {
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ASSERT_EFI_ERROR (Status);
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}
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if (EFI_ERROR(Status)) {
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SmBaseBuffer.SmBase = Base + Delta * Index;
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DEBUG ((DEBUG_INFO, "SmbaseAp(%d) - unknown, guess - 0x%x\n", Index, SmBaseBuffer.SmBase));
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} else {
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while (!SmBaseBuffer.Valid) {
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CpuPause ();
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}
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DEBUG ((DEBUG_INFO, "SmbaseAp(%d) - 0x%x\n", Index, SmBaseBuffer.SmBase));
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}
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}
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mSmBaseBuffer[Index] = SmBaseBuffer.SmBase;
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if (Base == 0) {
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Base = (UINTN)SmBaseBuffer.SmBase;
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DEBUG ((DEBUG_INFO, "-- Base - 0x%x\n", Base));
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} else if (Delta == 0) {
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Delta = (UINTN)(SmBaseBuffer.SmBase - Base);
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DEBUG ((DEBUG_INFO, "-- Delta - 0x%x\n", Delta));
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}
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}
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}
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BOOLEAN
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IsSmmSaveState (
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IN EFI_PHYSICAL_ADDRESS BaseAddress
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)
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{
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UINTN Index;
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UINTN TileCodeSize;
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UINTN TileDataSize;
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UINTN TileSize;
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SetupSmBaseBuffer ();
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TileCodeSize = SIZE_4KB; // BUGBUG: Assume 4KB
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TileCodeSize = ALIGN_VALUE(TileCodeSize, SIZE_4KB);
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TileDataSize = (SMRAM_SAVE_STATE_MAP_OFFSET - TXT_SMM_PSD_OFFSET) + sizeof (SMRAM_SAVE_STATE_MAP);
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TileDataSize = ALIGN_VALUE(TileDataSize, SIZE_4KB);
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TileSize = TileDataSize + TileCodeSize - 1;
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TileSize = 2 * GetPowerOfTwo32 ((UINT32)TileSize);
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for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
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if (Index == gSmst->NumberOfCpus - 1) {
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TileSize = SIZE_32KB;
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}
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if ((BaseAddress >= mSmBaseBuffer[Index] + SMM_HANDLER_OFFSET + TileCodeSize) &&
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(BaseAddress < mSmBaseBuffer[Index] + SMM_HANDLER_OFFSET + TileSize)) {
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return TRUE;
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}
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}
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return FALSE;
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}
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EFI_STATUS
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TestPointCheckPageTable (
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IN EFI_PHYSICAL_ADDRESS BaseAddress,
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IN UINTN Length,
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IN BOOLEAN IsCode,
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IN BOOLEAN IsOutsideSmram
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)
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{
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UINT64 *PageEntry;
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PAGE_ATTRIBUTE PageAttribute;
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UINTN PageEntryLength;
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EFI_PHYSICAL_ADDRESS BaseAddressEnd;
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ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);
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ASSERT ((Length & (SIZE_4KB - 1)) == 0);
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BaseAddressEnd = BaseAddress + Length;
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//
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// Below logic is to check 2M/4K page to make sure we donot waist memory.
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//
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while (BaseAddress < BaseAddressEnd) {
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PageEntry = GetPageTableEntry (BaseAddress, &PageAttribute);
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ASSERT (PageAttribute != PageNone);
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if (IsOutsideSmram) {
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if ((PageEntry != NULL) && ((*PageEntry & IA32_PG_P) != 0)) {
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DEBUG ((DEBUG_ERROR, "OutsideSmram present - 0x%x\n", BaseAddress));
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return EFI_INVALID_PARAMETER;
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}
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}
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if (IsCode) {
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if ((PageEntry == NULL) || ((*PageEntry & IA32_PG_P) == 0)) {
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DEBUG ((DEBUG_ERROR, "Code Page not exist - 0x%x\n", BaseAddress));
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return EFI_INVALID_PARAMETER;
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} else if ((*PageEntry & IA32_PG_RW) != 0) {
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//
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// Check if it is SMM SaveState
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//
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if (!IsSmmSaveState (BaseAddress)) {
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DEBUG ((DEBUG_ERROR, "Code Page read write - 0x%x\n", BaseAddress));
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return EFI_INVALID_PARAMETER;
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}
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}
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} else {
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if ((PageEntry == NULL) || ((*PageEntry & IA32_PG_P) == 0)) {
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// Pass
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} else if ((*PageEntry & IA32_PG_NX) == 0) {
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DEBUG ((DEBUG_ERROR, "Data Page executable - 0x%x\n", BaseAddress));
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return EFI_INVALID_PARAMETER;
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}
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}
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PageEntryLength = PageAttributeToLength (PageAttribute);
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PageEntryLength = (UINTN)((BaseAddress & ~(PageEntryLength - 1)) + PageEntryLength - BaseAddress);
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//
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// move to next
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//
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BaseAddress += PageEntryLength;
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Length -= PageEntryLength;
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}
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return RETURN_SUCCESS;
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}
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EFI_STATUS
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TestPointCheckPagingWithMemoryAttributesTable (
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IN EFI_MEMORY_ATTRIBUTES_TABLE *MemoryAttributesTable
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)
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{
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UINTN Index;
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EFI_MEMORY_DESCRIPTOR *Entry;
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EFI_STATUS Status;
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EFI_STATUS ReturnStatus;
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ReturnStatus = EFI_SUCCESS;
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Entry = (EFI_MEMORY_DESCRIPTOR *)(MemoryAttributesTable + 1);
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for (Index = 0; Index < MemoryAttributesTable->NumberOfEntries; Index++) {
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DEBUG ((DEBUG_INFO, "SmmMemoryAttribute Checking 0x%lx - 0x%x\n", Entry->PhysicalStart, EFI_PAGES_TO_SIZE((UINTN)Entry->NumberOfPages)));
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Status = TestPointCheckPageTable (
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Entry->PhysicalStart,
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EFI_PAGES_TO_SIZE((UINTN)Entry->NumberOfPages),
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((Entry->Attribute & EFI_MEMORY_RO) == 0) ? FALSE : TRUE,
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FALSE
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);
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if (EFI_ERROR(Status)) {
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ReturnStatus = Status;
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}
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Entry = NEXT_MEMORY_DESCRIPTOR (Entry, MemoryAttributesTable->DescriptorSize);
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}
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return ReturnStatus;
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}
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EFI_STATUS
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TestPointCheckSmmPaging (
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VOID
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)
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{
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EFI_STATUS Status;
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VOID *MemoryAttributesTable;
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DEBUG ((DEBUG_INFO, "==== TestPointCheckSmmPaging - Enter\n"));
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Status = SmmGetSystemConfigurationTable (&gEdkiiPiSmmMemoryAttributesTableGuid, (VOID **)&MemoryAttributesTable);
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if (!EFI_ERROR (Status)) {
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Status = TestPointCheckPagingWithMemoryAttributesTable(MemoryAttributesTable);
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}
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if (EFI_ERROR (Status)) {
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TestPointLibAppendErrorString (
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PLATFORM_TEST_POINT_ROLE_PLATFORM_IBV,
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NULL,
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TEST_POINT_BYTE6_SMM_READY_TO_BOOT_SMM_PAGE_LEVEL_PROTECTION_ERROR_CODE \
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TEST_POINT_SMM_READY_TO_BOOT \
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TEST_POINT_BYTE6_SMM_READY_TO_BOOT_SMM_PAGE_LEVEL_PROTECTION_ERROR_STRING
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);
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}
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DEBUG ((DEBUG_INFO, "==== TestPointCheckSmmPaging - Exit\n"));
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return EFI_SUCCESS;
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}
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