/** @file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/I2cAccessLib.h>
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EFI_STATUS
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I2cWriteRead (
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IN UINTN MmioBase,
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IN UINT8 SlaveAddress,
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IN UINT8 WriteLength,
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IN UINT8 *WriteBuffer,
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IN UINT8 ReadLength,
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IN UINT8 *ReadBuffer,
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IN UINT64 TimeBudget
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//TODO: add Speed parameter
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)
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{
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UINT8 ReadsNeeded = ReadLength;
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UINT64 CutOffTime;
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if ((WriteLength == 0 && ReadLength == 0) ||
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(WriteLength != 0 && WriteBuffer == NULL) ||
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(ReadLength != 0 && ReadBuffer == NULL) ) {
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DEBUG ((DEBUG_ERROR, "I2cWR Invalid Parameters\n"));
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return EFI_INVALID_PARAMETER;
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}
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//
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// Sanity checks to verify the I2C controller is alive
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// Conveniently, ICON register's values of 0 or FFFFFFFF indicate
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// I2c controller is out-of-order: either disabled, in D3 or in reset.
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//
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if (MmioRead32(MmioBase+R_IC_CON) == 0xFFFFFFFF || MmioRead32(MmioBase+R_IC_CON) == 0x0) {
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DEBUG ((DEBUG_ERROR, "I2cWR Device Error\n"));
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return EFI_DEVICE_ERROR;
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}
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MmioWrite32(MmioBase+R_IC_ENABLE, 0x0);
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MmioRead32(MmioBase+0x40);
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MmioRead32(MmioBase+R_IC_CLR_TX_ABRT);
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MmioWrite32(MmioBase+R_IC_SDA_HOLD, 0x001C001C);
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//
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// Set I2C Bus Speed at 400 kHz for GPIO Expander
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//
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MmioWrite32(MmioBase + R_IC_FS_SCL_HCNT, 128);
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MmioWrite32(MmioBase + R_IC_FS_SCL_LCNT, 160);
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MmioWrite32(MmioBase + R_IC_TAR, SlaveAddress);
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MmioWrite32(MmioBase + R_IC_CON, B_IC_MASTER_MODE | V_IC_SPEED_FAST | B_IC_RESTART_EN | B_IC_SLAVE_DISABLE );
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MmioWrite32(MmioBase+R_IC_ENABLE, 0x1);
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CutOffTime = AsmReadTsc() + TimeBudget;
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while ( (MmioRead32(MmioBase+R_IC_ENABLE_STATUS) & 1)==0 ) {
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if (AsmReadTsc() > CutOffTime) {
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DEBUG ((DEBUG_ERROR, "I2cWR timeout\n"));
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return EFI_TIMEOUT;
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}
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}
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while(1) {
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if(MmioRead32(MmioBase+R_IC_INTR_STAT) & B_IC_INTR_TX_ABRT) {
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DEBUG ((DEBUG_ERROR, "I2cWR Transfer aborted, reason = 0x%08x\n",MmioRead32(MmioBase+R_IC_TX_ABRT_SOURCE)));
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MmioRead32(MmioBase+R_IC_CLR_TX_ABRT);
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MmioAnd32(MmioBase+R_IC_ENABLE, 0xFFFFFFFE);
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while ( (MmioRead32(MmioBase+R_IC_ENABLE_STATUS) & 1)==1 ) {}
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return EFI_DEVICE_ERROR;
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}
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if (MmioRead32(MmioBase+R_IC_STATUS) & B_IC_STATUS_TFNF) {
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if (WriteLength > 1) {
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MmioWrite32(MmioBase+R_IC_DATA_CMD, *WriteBuffer);
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WriteBuffer++;
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WriteLength--;
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} else if (WriteLength==1 && ReadLength != 0) {
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MmioWrite32(MmioBase+R_IC_DATA_CMD, *WriteBuffer);
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WriteBuffer++;
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WriteLength--;
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} else if (WriteLength==1 && ReadLength == 0) {
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MmioWrite32(MmioBase+R_IC_DATA_CMD, *WriteBuffer | B_IC_CMD_STOP);
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WriteBuffer++;
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WriteLength--;
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} else if (ReadLength > 1) {
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MmioWrite32(MmioBase+R_IC_DATA_CMD, B_IC_CMD_READ);
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ReadLength--;
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} else if (ReadLength == 1) {
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MmioWrite32(MmioBase+R_IC_DATA_CMD, B_IC_CMD_READ|B_IC_CMD_STOP);
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ReadLength--;
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}
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}
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if (ReadsNeeded) {
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if (MmioRead32(MmioBase+R_IC_STATUS) & B_IC_STATUS_RFNE) {
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*ReadBuffer = (UINT8)MmioRead32(MmioBase+R_IC_DATA_CMD);
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ReadBuffer++;
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ReadsNeeded--;
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}
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}
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if (WriteLength==0 && ReadsNeeded==0 && !(MmioRead32(MmioBase+R_IC_STATUS)&B_IC_STATUS_ACTIVITY)) {
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MmioAnd32(MmioBase+R_IC_ENABLE, 0xFFFFFFFE);
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while ( (MmioRead32(MmioBase+R_IC_ENABLE_STATUS) & 1)==1 ) {}
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DEBUG ((DEBUG_INFO, "I2cWR success\n"));
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return EFI_SUCCESS;
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}
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if (AsmReadTsc() > CutOffTime) {
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MmioAnd32(MmioBase+R_IC_ENABLE, 0xFFFFFFFE);
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while ( (MmioRead32(MmioBase+R_IC_ENABLE_STATUS) & 1)==1 ) {}
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DEBUG ((DEBUG_ERROR, "I2cWR wrong ENST value\n"));
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return EFI_TIMEOUT;
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}
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}
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}
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