/** @file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _SIO_REG_H_
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#define _SIO_REG_H_
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#define REG_LOGICAL_DEVICE 0x07
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#define ACTIVATE 0x30
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#define BASE_ADDRESS_HIGH0 0x60
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#define BASE_ADDRESS_LOW0 0x61
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#define BASE_ADDRESS_HIGH1 0x62
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#define BASE_ADDRESS_LOW1 0x63
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#define BASE_ADDRESS_HIGH2 0x64
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#define BASE_ADDRESS_LOW2 0x65
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#define BASE_ADDRESS_HIGH3 0x66
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#define BASE_ADDRESS_LOW3 0x67
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#define PRIMARY_INTERRUPT_SELECT 0x70
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#define WAKEUP_ON_IRQ_EN 0x70
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#define INTERRUPT_TYPE 0x71
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#define DMA_CHANNEL_SELECT0 0x74
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#define DMA_CHANNEL_SELECT1 0x75
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//
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//Port address for PILOT - III
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//
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#define PILOTIII_CHIP_ID 0x03
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#define PILOTIII_SIO_INDEX_PORT 0x04E
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#define PILOTIII_SIO_DATA_PORT (PILOTIII_SIO_INDEX_PORT+1)
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#define PILOTIII_UNLOCK 0x5A
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#define PILOTIII_LOCK 0xA5
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//
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// logical device in PILOT-III
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//
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#define PILOTIII_SIO_PSR 0x00
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#define PILOTIII_SIO_COM2 0x01
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#define PILOTIII_SIO_COM1 0x02
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#define PILOTIII_SIO_SWCP 0x03
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#define PILOTIII_SIO_GPIO 0x04
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#define PILOTIII_SIO_WDT 0x05
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#define PILOTIII_SIO_KCS3 0x08
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#define PILOTIII_SIO_KCS4 0x09
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#define PILOTIII_SIO_KCS5 0x0A
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#define PILOTIII_SIO_BT 0x0B
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#define PILOTIII_SIO_SMIC 0x0C
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#define PILOTIII_SIO_MAILBOX 0x0D
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#define PILOTIII_SIO_RTC 0x0E
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#define PILOTIII_SIO_SPI 0x0F
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#define PILOTIII_SIO_TAP 0x10
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//
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// Regisgers for Pilot-III
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//
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#define PILOTIII_CHIP_ID_REG 0x20
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#define PILOTIII_LOGICAL_DEVICE REG_LOGICAL_DEVICE
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#define PILOTIII_ACTIVATE ACTIVATE
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#define PILOTIII_BASE_ADDRESS_HIGH0 BASE_ADDRESS_HIGH0
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#define PILOTIII_BASE_ADDRESS_LOW0 BASE_ADDRESS_LOW0
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#define PILOTIII_BASE_ADDRESS_HIGH1 BASE_ADDRESS_HIGH1
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#define PILOTIII_BASE_ADDRESS_LOW1 BASE_ADDRESS_LOW1
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#define PILOTIII_PRIMARY_INTERRUPT_SELECT PRIMARY_INTERRUPT_SELECT
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//
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// Port address for PC8374
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//
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#define PC8374_SIO_INDEX_PORT 0x02E
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#define PC8374_SIO_DATA_PORT (PC8374_SIO_INDEX_PORT+1)
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//
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// Logical device in PC8374
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//
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#define PC8374_SIO_FLOPPY 0x00
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#define PC8374_SIO_PARA 0x01
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#define PC8374_SIO_COM2 0x02
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#define PC8374_SIO_COM1 0x03
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#define PC8374_SIO_MOUSE 0x05
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#define PC8374_SIO_KYBD 0x06
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#define PC8374_SIO_GPIO 0x07
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//
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// Registers specific for PC8374
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//
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#define PC8374_CLOCK_SELECT 0x2D
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#define PC8374_CLOCK_CONFIG 0x29
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//
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// Registers for PC8374
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//
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#define PC8374_LOGICAL_DEVICE REG_LOGICAL_DEVICE
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#define PC8374_ACTIVATE ACTIVATE
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#define PC8374_BASE_ADDRESS_HIGH0 BASE_ADDRESS_HIGH0
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#define PC8374_BASE_ADDRESS_LOW0 BASE_ADDRESS_LOW0
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#define PC8374_PRIMARY_INTERRUPT_SELECT PRIMARY_INTERRUPT_SELECT
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#define PC8374_DMA_CHANNEL_SELECT DMA_CHANNEL_SELECT0
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#define PC87427_SERVERIO_CNF2 0x22
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//
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// Pilot III Mailbox Data Register definitions
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//
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#define MBDAT00_OFFSET 0x00
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#define MBDAT01_OFFSET 0x01
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#define MBDAT02_OFFSET 0x02
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#define MBDAT03_OFFSET 0x03
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#define MBDAT04_OFFSET 0x04
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#define MBDAT05_OFFSET 0x05
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#define MBDAT06_OFFSET 0x06
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#define MBDAT07_OFFSET 0x07
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#define MBDAT08_OFFSET 0x08
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#define MBDAT09_OFFSET 0x09
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#define MBDAT10_OFFSET 0x0A
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#define MBDAT11_OFFSET 0x0B
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#define MBDAT12_OFFSET 0x0C
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#define MBDAT13_OFFSET 0x0D
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#define MBDAT14_OFFSET 0x0E
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#define MBDAT15_OFFSET 0x0F
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#define MBST0_OFFSET 0x10
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#define MBST1_OFFSET 0x11
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#define MBBINT_OFFSET 0x12
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//
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// Mailbox Bit definitions...
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//
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#define MBBINT_MBBIST_BIT 0x80
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// If both are there, use the default one
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//
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#define W83527_EXIST BIT2
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#define PC8374_EXIST BIT1
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#define PILOTIII_EXIST BIT0
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#define DEFAULT_SIO PILOTIII_EXIST
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#define DEFAULT_KDB PC8374_EXIST
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#define IPMI_DEFAULT_SMM_IO_BASE 0xca2
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//
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// For Pilot III
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//
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#define PILOTIII_SWC_BASE_ADDRESS 0xA00
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#define PILOTIII_PM1b_EVT_BLK_BASE_ADDRESS 0x0A80
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#define PILOTIII_PM1b_CNT_BLK_BASE_ADDRESS 0x0A84
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#define PILOTIII_GPE1_BLK_BASE_ADDRESS 0x0A86
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#define PILOTIII_KCS3_DATA_BASE_ADDRESS 0x0CA4
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#define PILOTIII_KCS3_CMD_BASE_ADDRESS 0x0CA5
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#define PILOTIII_KCS4_DATA_BASE_ADDRESS 0x0CA2
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#define PILOTIII_KCS4_CMD_BASE_ADDRESS 0x0CA3
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#define PILOTIII_MAILBOX_BASE_ADDRESS 0x0600
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#define PILOTIII_MAILBOX_MASK 0xFFE0
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#define BMC_KCS_BASE_ADDRESS 0x0CA0
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#endif
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