## @file
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# PCD configuration build description file for the Aspire VN7-572G board.
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#
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# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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################################################################################
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#
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# Pcd Section - list of all PCD Entries used by this board.
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#
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################################################################################
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# TODO: Harden and tune platform by PCDs
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# TODO: Consider removing PCDs declared by build report to be unused (but confirm first)
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# - Also, consider more "fixed" and more "dynamic"/"patchable"
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[PcdsFixedAtBuild.common]
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######################################
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# Key Boot Stage and FSP configuration
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######################################
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#
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# Please select the Boot Stage here.
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# Stage 1 - enable debug (system deadloop after debug init)
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# Stage 2 - mem init (system deadloop after mem init)
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# Stage 3 - boot to shell only
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# Stage 4 - boot to OS
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# Stage 5 - boot to OS with security boot enabled
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# Stage 6 - boot with advanced features enabled
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#
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gMinPlatformPkgTokenSpaceGuid.PcdBootStage|6
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#
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# 0: FSP Wrapper is running in Dispatch mode.
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# 1: FSP Wrapper is running in API mode.
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0
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#
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# FALSE: The board is not a FSP wrapper (FSP binary not used)
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# TRUE: The board is a FSP wrapper (FSP binary is used)
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#
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gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
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#
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# FALSE: The PEI Main included in FvPreMemory is used to dispatch all PEIMs
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# (both inside FSP and outside FSP).
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# Pros:
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# * PEI Main is re-built from source and is always the latest version
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# * Platform code can link any desired LibraryClass to PEI Main
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# (Ex: Custom DebugLib instance, SerialPortLib, etc.)
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# Cons:
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# * The PEI Main being used to execute FSP PEIMs is not the PEI Main
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# that the FSP PEIMs were tested with, adding risk of breakage.
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# * Two copies of PEI Main will exist in the final binary,
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# #1 in FSP-M, #2 in FvPreMemory. The copy in FSP-M is never
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# executed, wasting space.
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#
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# <b>TRUE</b>: The PEI Main included in FSP is used to dispatch all PEIMs
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# (both inside FSP and outside FSP). PEI Main will not be included in
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# FvPreMemory. This is the default and is the recommended choice.
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#
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gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE
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#
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# FSP Base address PCD will be updated in FDF basing on flash map.
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0
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gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
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gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
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gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000
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gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
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gSiPkgTokenSpaceGuid.PcdTsegSize|0x0800000 # Now hooked up
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!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
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#
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# FSP API mode does not share stack with the boot loader,
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# so FSP needs more temporary memory for FSP heap + stack size.
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#
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gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x28000 # FIXME: Confirm matches UPD default
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#
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# FSP API mode does not need to enlarge the boot loader stack size
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# since the stacks are separate.
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#
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gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000 # Not hooked up, not used (functionally equivalent and equal to UefiCpuPkg)
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!else
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#
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# In FSP Dispatch mode boot loader stack size must be large
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# enough for executing both boot loader and FSP.
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#
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gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000 # Not hooked up, not used (functionally equivalent but NOT equal to UefiCpuPkg)
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!endif
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!if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
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gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
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gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
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!else
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#
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# FSP Dispatch mode requires more platform memory as boot loader and FSP sharing the same
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# platform memory.
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#
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gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000
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!endif
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[PcdsFeatureFlag.common]
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######################################
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# Edk2 Configuration
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######################################
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gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
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gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE # Deprecated, only use GOP
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gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdPs2KbdExtendedVerification|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdPs2MouseExtendedVerification|FALSE # TODO/TEST
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gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE
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# TODO: Prune this list to relevant features only
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 6
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# FIXME: SMM path also PatchAndLoadAcpiTable()
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gAcpiDebugFeaturePkgTokenSpaceGuid.PcdAcpiDebugFeatureEnable |FALSE
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# PcdIpmiFeatureEnable will not be enabled (no BMC)
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# TODO: Can be build-time (user) choice
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gNetworkFeaturePkgTokenSpaceGuid.PcdNetworkFeatureEnable |FALSE
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# TODO: Continue developing support. Broken at present.
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# - PeiSmmAccessLib in IntelSiliconPkg seems like a stub
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# - May require a PeiSmmControlLib to SMM communicate
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gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable |FALSE
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# TODO: Definitions (now added SmbiosDxe)
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gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable |TRUE
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# Requires actual hook-up
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gUsb3DebugFeaturePkgTokenSpaceGuid.PcdUsb3DebugFeatureEnable |FALSE
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# FIXME: (Similar) DXE module is duplicate?
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gUserAuthFeaturePkgTokenSpaceGuid.PcdUserAuthenticationFeatureEnable |FALSE
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# FIXME: Must BootLogoEnableLogo() to turn platform logo into boot logo
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# - BGRT must be BMP, but this duplicates FSP logo. Can GetSectionFromAnyFv()?
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gLogoFeaturePkgTokenSpaceGuid.PcdLogoFeatureEnable |FALSE
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gLogoFeaturePkgTokenSpaceGuid.PcdJpgEnable |FALSE
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!endif
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######################################
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# Silicon Configuration
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######################################
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# TODO: Set FSP policy by switches? Otherwise, only FSP binary builds?
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# Build switches
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gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE
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# CPU
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gSiPkgTokenSpaceGuid.PcdBiosGuardEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE
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# SA
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gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSaDmiEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSkycamEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdGmmEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSaOcEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE
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# ME
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gSiPkgTokenSpaceGuid.PcdAmtEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE
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# Others
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gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdBootGuardEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdEvLoaderEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE
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gSiPkgTokenSpaceGuid.PcdSerialGpioEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|$(RELEASE_LOGGING)
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gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSoftwareGuardEnable|TRUE
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gSiPkgTokenSpaceGuid.PcdSsaFlagEnable|FALSE
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gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE
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######################################
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# Platform Configuration
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######################################
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gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE # FIXME: Define by PERFORMANCE_BUILD?
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gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdSerialTerminalEnable|FALSE # FIXME: Define in build-system?
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1
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gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2
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gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3
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gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE
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gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4
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gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5
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gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE
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gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE
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!endif
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# TODO: Is TESTING setting, is not test point
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!if $(TARGET) == DEBUG
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gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE
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!else
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gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE
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!endif
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######################################
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# Board Configuration
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######################################
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMultiBoardSupport|FALSE
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdTbtEnable|FALSE # TODO: Enable if supporting Newgate
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[PcdsFixedAtBuild.common]
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######################################
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# Edk2 Configuration
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######################################
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!if $(TARGET) == RELEASE
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!if $(RELEASE_LOGGING) == TRUE
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!if $(TESTING) == TRUE
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gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x07
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!else
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gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x03
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!endif # $(TESTING)
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gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
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!else
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gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
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gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
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!endif # $(RELEASE_LOGGING)
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!else
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# FIXME: More than just compiler optimisation is hooked to DEBUG builds.
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# Make asserts non-fatal for limited debugging system
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gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0F
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gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
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!endif # $(TARGET)
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!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
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gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
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gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
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!endif
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gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
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gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
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gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
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gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard|TRUE
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gEfiMdeModulePkgTokenSpaceGuid.PcdFastPS2Detection|TRUE # TODO/TEST
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gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
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gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
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gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
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gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8000
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!if $(TESTING) == TRUE
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# Test with non-stop mode, so not disabling for loader.
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gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask|0x43
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!else
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# FIXME: Can be broken for CSM. At this time, be permissive for loader.
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gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask|0x83
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!endif
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gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE
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gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE
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!if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable == TRUE
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gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1
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!endif
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gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
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gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
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!if $(TARGET) == RELEASE
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gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
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!else
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gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
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!endif
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# UPDs are updated at runtime, don't bother measuring
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# BUGBUG: FSP-S measurement returns DEVICE_ERROR from PtpCrbTpmCommand() - Step 0.
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# - Similarly, Tcg2Dxe.c:Tpm2GetCapabilityManufactureID() - first command - fails?
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig|0x00000006
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08
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# Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000
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!if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || (gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1)
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#
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# In non-FSP build (EDK2 build) or FSP API mode below PCD are FixedAtBuild
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# (They will be DynamicEx in FSP Dispatch mode)
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#
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## Specifies max supported number of Logical Processors.
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# @Prompt Configure max supported number of Logical Processors
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|8
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## Specifies the size of the microcode Region.
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# @Prompt Microcode Region size.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0
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## Specifies the AP wait loop state during POST phase.
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# The value is defined as below.
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# 1: Place AP in the Hlt-Loop state.
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# 2: Place AP in the Mwait-Loop state.
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# 3: Place AP in the Run-Loop state.
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# @Prompt The AP wait loop state.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2
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!endif
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######################################
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# Silicon Configuration
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######################################
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# Refer to HstiFeatureBit.h for bit definitions
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gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 # FIXME: Boot Guard and BIOS Guard not present, measured boot enforcement checking code not present
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gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
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######################################
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# Platform Configuration
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######################################
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gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1
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gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|4
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gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
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gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000
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#
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# The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
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#
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# BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
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# BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
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# that lie entirely within the expected fixed memory regions.
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# BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
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# BIT3-31: Reserved
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#
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gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
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## This PCD is to control which device is the potential trusted console input device.<BR><BR>
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# For example:<BR>
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# PS/2 keyboard: PciRoot(0x0)/Pci(0x1F,0x0)/Acpi(PNP0303,0x0)<BR>
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# //Header HID UID<BR>
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# {0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00,<BR>
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# //Header Func Dev<BR>
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# 0x01, 0x01, 0x06, 0x00, 0x00, 0x1F,<BR>
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# //Header HID UID<BR>
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# 0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00,<BR>
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# //Header<BR>
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# 0x7F, 0xFF, 0x04, 0x00}<BR>
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gMinPlatformPkgTokenSpaceGuid.PcdTrustedConsoleInputDevicePath|{0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x06, 0x00, 0x00, 0x1F, 0x02, 0x01, 0x0C, 0x00, 0xd0, 0x41, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xFF, 0x04, 0x00}
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!if $(TARGET) == RELEASE
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x800
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!else
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B # TODO
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!endif
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# TODO: Consider using reserved space instead for debug log
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x200
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!if $(TARGET) == RELEASE
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70
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!else
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gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 1
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gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 2
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gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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!endif
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|
!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 3
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gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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!endif
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|
!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 4
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gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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!endif
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|
!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage == 5
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gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 6
|
gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
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!endif
|
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######################################
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# Board Configuration
|
######################################
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gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
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gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00, 0x1F, 0x00}
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|
[PcdsFixedAtBuild.IA32]
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######################################
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# Edk2 Configuration
|
######################################
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gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
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gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000
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|
######################################
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# Platform Configuration
|
######################################
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gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
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|
[PcdsFixedAtBuild.X64]
|
######################################
|
# Edk2 Configuration
|
######################################
|
|
# Default platform supported RFC 4646 languages: (American) English
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gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US"
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[PcdsPatchableInModule.common]
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######################################
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# Edk2 Configuration
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######################################
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gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046 # 0x804800C7/0x806A15CF give useful information, but is very noisy
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######################################
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# Silicon Configuration
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######################################
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!if $(TARGET) == DEBUG
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gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable|1
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!endif
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######################################
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# Platform Configuration
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######################################
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!if $(TARGET) == DEBUG
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gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|1
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!else
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gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|0
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!endif
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[PcdsDynamicDefault]
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######################################
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# Edk2 Configuration
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######################################
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gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE # Why dynamic?
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gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE # Why dynamic?
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gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0
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gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0
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gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
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#
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# Set video to native resolution as Windows 8 WHCK requirement.
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#
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gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0
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gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0
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gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap|0
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gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0x0000001F
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gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
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gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
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#
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# FSP Base address PCD will be updated in FDF basing on flash map.
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0
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# Platform will pre-allocate UPD buffer and pass it to FspWrapper
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# Those dummy address will be patched before FspWrapper executing
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF
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######################################
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# Board Configuration
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######################################
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDisablePassiveTripPoints|1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLowPowerS0Idle|1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPciExpNative|1
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# Thunderbolt Configuration (FIXME: Remove if not supporting Newgate)
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcDcSwitch|0x0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcpiGpeSignature|0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting|0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtAspm|0x0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad|0x02010011
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtControllerEn|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtControllerType|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtForcepowerGpioPad|13
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtGpioAccessType|0x2
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtGpioLevel|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotNotify|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtHotSMI|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd|56
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax|26
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieMemRsvd|100
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax|28
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPciePMemRsvd|100
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtPcieRpNumber|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtSecurityMode|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtSetClkReq|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtWakeupSupport|0x0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdDTbtWin10Support|0x0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdExpander|0x0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPchPcieRootPortHpe|0x00000001
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3Tbt|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtClkReq|0x1
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtClkReqDelay|0x0
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gKabylakeOpenBoardPkgTokenSpaceGuid.PcdRtd3TbtOffDelay|5000
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[PcdsDynamicHii.X64.DEFAULT]
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######################################
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# Edk2 Configuration
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######################################
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gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
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!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
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gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout"
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!else
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gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
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!endif
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!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
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gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x0|"1.3"|NV,BS
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gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|3|NV,BS
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!endif
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