/** @file
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This file is SampleCode of the library for Intel CPU PEI Policy initialization.
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Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "PeiCpuPolicyUpdate.h"
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#include <Library/ConfigBlockLib.h>
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#include <Library/PmcLib.h>
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#include <Library/PchCycleDecodingLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/SpiLib.h>
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/**
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Check on the processor if SGX is supported.
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@retval True if SGX supported or FALSE if not
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**/
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BOOLEAN
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IsSgxCapSupported (
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VOID
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)
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{
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EFI_CPUID_REGISTER CpuidRegs;
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///
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/// Processor support SGX feature by reading CPUID.(EAX=7,ECX=0):EBX[2]
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///
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AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, &CpuidRegs.RegEax,&CpuidRegs.RegEbx,&CpuidRegs.RegEcx,&CpuidRegs.RegEdx);
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///
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/// SGX feature is supported only on WHL and later,
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/// with CPUID.(EAX=7,ECX=0):EBX[2]=1
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/// PRMRR configuration enabled, MSR IA32_MTRRCAP (FEh) [12] == 1
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///
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if ((CpuidRegs.RegEbx & BIT2) && (AsmReadMsr64 (MSR_IA32_MTRRCAP) & BIT12)) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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This function performs CPU PEI Policy initialization in Pre-memory.
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@param[in] SiPreMemPolicyPpi The SI Pre-Mem Policy PPI instance
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@retval EFI_SUCCESS The PPI is installed and initialized.
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@retval EFI ERRORS The PPI is not successfully installed.
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@retval EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver
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**/
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EFI_STATUS
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EFIAPI
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UpdatePeiCpuPolicyPreMem (
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IN OUT SI_PREMEM_POLICY_PPI *SiPreMemPolicyPpi
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)
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{
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EFI_STATUS Status;
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EFI_BOOT_MODE BootMode;
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CPU_CONFIG_LIB_PREMEM_CONFIG *CpuConfigLibPreMemConfig;
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CPU_OVERCLOCKING_PREMEM_CONFIG *CpuOverClockingPreMemConfig;
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UINT32 PchSpiBar0;
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UINT32 MaxLogicProcessors;
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Status = GetConfigBlock ((VOID *) SiPreMemPolicyPpi, &gCpuConfigLibPreMemConfigGuid, (VOID *) &CpuConfigLibPreMemConfig);
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ASSERT_EFI_ERROR (Status);
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Status = GetConfigBlock ((VOID *) SiPreMemPolicyPpi, &gCpuOverclockingPreMemConfigGuid, (VOID *) &CpuOverClockingPreMemConfig);
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ASSERT_EFI_ERROR (Status);
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DEBUG ((DEBUG_INFO, "UpdatePeiCpuPolicyPreMem Start\n"));
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//
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// Get current boot mode
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//
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Status = PeiServicesGetBootMode (&BootMode);
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ASSERT_EFI_ERROR (Status);
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SpiServiceInit ();
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PchSpiBar0 = PciSegmentRead32 (PCI_SEGMENT_LIB_ADDRESS (
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DEFAULT_PCI_SEGMENT_NUMBER_PCH,
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PCI_DEVICE_NUMBER_PCH_SPI,
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PCI_FUNCTION_NUMBER_PCH_SPI,
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R_SPI_CFG_BAR0
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));
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PchSpiBar0 &= ~(B_SPI_CFG_BAR0_MASK);
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if (PchSpiBar0 == 0) {
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DEBUG ((DEBUG_ERROR, "ERROR : PchSpiBar0 is invalid!\n"));
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ASSERT (FALSE);
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}
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CpuConfigLibPreMemConfig->PeciC10Reset = 0;
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CpuConfigLibPreMemConfig->CpuRatio = 0;
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///
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/// Set PcdCpuMaxLogicalProcessorNumber to max number of logical processors enabled
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/// Read MSR_CORE_THREAD_COUNT (0x35) to check the total active Threads
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///
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MaxLogicProcessors = (UINT32) (AsmReadMsr64 (MSR_CORE_THREAD_COUNT) & B_THREAD_COUNT_MASK);
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DEBUG ((DEBUG_INFO, "MaxLogicProcessors = %d\n", MaxLogicProcessors));
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PcdSet32S (PcdCpuMaxLogicalProcessorNumber, MaxLogicProcessors);
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return EFI_SUCCESS;
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}
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