/** @file
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Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiDxe.h>
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#include <Library/ArmPlatformSysConfigLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include <Library/DebugLib.h>
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#include <Library/LcdPlatformLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Protocol/Cpu.h>
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#include <Protocol/EdidDiscovered.h>
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#include <Protocol/EdidActive.h>
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#include <ArmPlatform.h>
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typedef struct {
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UINT32 Mode;
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LCD_BPP Bpp;
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UINT32 OscFreq;
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SCAN_TIMINGS Horizontal;
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SCAN_TIMINGS Vertical;
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} DISPLAY_MODE;
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/** The display modes supported by the platform.
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**/
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STATIC DISPLAY_MODE mDisplayModes[] = {
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{ // Mode 0 : VGA : 640 x 480 x 24 bpp
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VGA, LcdBitsPerPixel_24,
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VGA_OSC_FREQUENCY,
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{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
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{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
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},
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{ // Mode 1 : SVGA : 800 x 600 x 24 bpp
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SVGA, LcdBitsPerPixel_24,
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SVGA_OSC_FREQUENCY,
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{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
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{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
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},
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{ // Mode 2 : XGA : 1024 x 768 x 24 bpp
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XGA, LcdBitsPerPixel_24,
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XGA_OSC_FREQUENCY,
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{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
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{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
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},
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{ // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
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SXGA, LcdBitsPerPixel_24,
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(SXGA_OSC_FREQUENCY/2),
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{SXGA_H_RES_PIXELS, SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH},
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{SXGA_V_RES_PIXELS, SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH}
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},
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{ // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
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UXGA, LcdBitsPerPixel_24,
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(UXGA_OSC_FREQUENCY/2),
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{UXGA_H_RES_PIXELS, UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH},
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{UXGA_V_RES_PIXELS, UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH}
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},
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{ // Mode 5 : HD : 1920 x 1080 x 24 bpp
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HD, LcdBitsPerPixel_24,
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(HD_OSC_FREQUENCY/2),
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{HD_H_RES_PIXELS, HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH},
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{HD_V_RES_PIXELS, HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH}
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},
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{ // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)
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VGA, LcdBitsPerPixel_16_565,
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VGA_OSC_FREQUENCY,
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{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
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{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
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},
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{ // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)
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SVGA, LcdBitsPerPixel_16_565,
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SVGA_OSC_FREQUENCY,
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{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
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{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
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},
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{ // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)
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XGA, LcdBitsPerPixel_16_565,
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XGA_OSC_FREQUENCY,
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{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
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{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
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},
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{ // Mode 9 : VGA : 640 x 480 x 15 bpp
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VGA, LcdBitsPerPixel_16_555,
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VGA_OSC_FREQUENCY,
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{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
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{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
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},
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{ // Mode 10 : SVGA : 800 x 600 x 15 bpp
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SVGA, LcdBitsPerPixel_16_555,
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SVGA_OSC_FREQUENCY,
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{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
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{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
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},
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{ // Mode 11 : XGA : 1024 x 768 x 15 bpp
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XGA, LcdBitsPerPixel_16_555,
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XGA_OSC_FREQUENCY,
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{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
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{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
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},
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{ // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings
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XGA, LcdBitsPerPixel_16_555,
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63500000,
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{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
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{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
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},
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{ // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)
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VGA, LcdBitsPerPixel_12_444,
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VGA_OSC_FREQUENCY,
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{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
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{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
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},
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{ // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)
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SVGA, LcdBitsPerPixel_12_444,
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SVGA_OSC_FREQUENCY,
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{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
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{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
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},
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{ // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)
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XGA, LcdBitsPerPixel_12_444,
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XGA_OSC_FREQUENCY,
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{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
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{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
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}
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};
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EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = {
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0,
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NULL
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};
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EFI_EDID_ACTIVE_PROTOCOL mEdidActive = {
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0,
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NULL
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};
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/** PL111 Platform specific initialization function.
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@param[in] Handle Handle to the LCD device instance.
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@retval EFI_SUCCESS Plaform library initialized successfully.
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@retval EFI_UNSUPPORTED PcdGopPixelFormat must be
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PixelRedGreenBlueReserved8BitPerColor OR
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PixelBlueGreenRedReserved8BitPerColor
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any other format is not supported
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@retval !(EFI_SUCCESS) Other errors.
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**/
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EFI_STATUS
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LcdPlatformInitializeDisplay (
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IN EFI_HANDLE Handle
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)
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{
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EFI_STATUS Status;
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EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
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// PixelBitMask and PixelBltOnly pixel formats are not supported
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PixelFormat = FixedPcdGet32 (PcdGopPixelFormat);
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if (PixelFormat != PixelRedGreenBlueReserved8BitPerColor &&
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PixelFormat != PixelBlueGreenRedReserved8BitPerColor) {
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ASSERT (PixelFormat == PixelRedGreenBlueReserved8BitPerColor ||
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PixelFormat == PixelBlueGreenRedReserved8BitPerColor);
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return EFI_UNSUPPORTED;
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}
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// Set the FPGA multiplexer to select the video output from the motherboard
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// or the daughterboard
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Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);
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if (!EFI_ERROR (Status)) {
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// Install the EDID Protocols
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Status = gBS->InstallMultipleProtocolInterfaces (
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&Handle,
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&gEfiEdidDiscoveredProtocolGuid,
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&mEdidDiscovered,
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&gEfiEdidActiveProtocolGuid,
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&mEdidActive,
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NULL
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);
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}
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return Status;
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}
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/** Allocate VRAM memory in DRAM for the framebuffer
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(unless it is reserved already).
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The allocated address can be used to set the framebuffer.
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@param[out] VramBaseAddress A pointer to the framebuffer address.
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@param[out] VramSize A pointer to the size of the framebuffer
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in bytes
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@retval EFI_SUCCESS Framebuffer memory allocated successfully.
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@retval !(EFI_SUCCESS) Other errors.
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**/
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EFI_STATUS
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LcdPlatformGetVram (
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OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
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OUT UINTN* VramSize
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)
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{
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EFI_STATUS Status;
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EFI_CPU_ARCH_PROTOCOL *Cpu;
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ASSERT (VramBaseAddress != NULL);
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ASSERT (VramSize != NULL);
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// Is it on the motherboard or on the daughterboard?
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switch (PL111_CLCD_SITE) {
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case ARM_VE_MOTHERBOARD_SITE:
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*VramBaseAddress = (EFI_PHYSICAL_ADDRESS)PL111_CLCD_VRAM_MOTHERBOARD_BASE;
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*VramSize = LCD_VRAM_SIZE;
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Status = EFI_SUCCESS;
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break;
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case ARM_VE_DAUGHTERBOARD_1_SITE:
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*VramBaseAddress = (EFI_PHYSICAL_ADDRESS)LCD_VRAM_CORE_TILE_BASE;
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*VramSize = LCD_VRAM_SIZE;
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// Allocate the VRAM from the DRAM so that nobody else uses it.
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Status = gBS->AllocatePages (
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AllocateAddress,
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EfiReservedMemoryType,
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EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
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VramBaseAddress
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);
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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// Ensure the Cpu architectural protocol is already installed
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Status = gBS->LocateProtocol (
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&gEfiCpuArchProtocolGuid,
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NULL,
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(VOID **)&Cpu
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);
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if (!EFI_ERROR (Status)) {
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// The VRAM is inside the DRAM, which is cacheable.
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// Mark the VRAM as write-combining (uncached) and non-executable.
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Status = Cpu->SetMemoryAttributes (
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Cpu,
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*VramBaseAddress,
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*VramSize,
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EFI_MEMORY_WC | EFI_MEMORY_XP
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);
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}
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));
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}
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break;
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default:
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// Unsupported site
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Status = EFI_UNSUPPORTED;
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break;
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}
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return Status;
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}
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/** Return total number of modes supported.
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Note: Valid mode numbers are 0 to MaxMode - 1
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See Section 12.9 of the UEFI Specification 2.7
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@retval UINT32 Mode Number.
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**/
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UINT32
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LcdPlatformGetMaxMode (VOID)
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{
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// The following line would correctly report the total number
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// of graphics modes supported by the PL111CLCD.
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// return (sizeof(mResolutions) / sizeof(CLCD_RESOLUTION)) - 1;
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// However, on some platforms it is desirable to ignore some graphics modes.
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// This could be because the specific implementation of PL111 has
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// certain limitations.
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// Set the maximum mode allowed
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return (FixedPcdGet32 (PcdPL111LcdMaxMode));
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}
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/** Set the requested display mode.
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@param[in] ModeNumber Mode Number.
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@retval EFI_SUCCESS Mode set successfully.
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@retval EFI_INVALID_PARAMETER Requested mode not found.
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@retval EFI_UNSUPPORTED PLL111 configuration not supported.
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@retval !(EFI_SUCCESS) Other errors.
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**/
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EFI_STATUS
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LcdPlatformSetMode (
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IN UINT32 ModeNumber
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)
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{
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EFI_STATUS Status;
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UINT32 OscillatorId;
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SYS_CONFIG_FUNCTION Function;
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UINT32 SysId;
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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switch (PL111_CLCD_SITE) {
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case ARM_VE_MOTHERBOARD_SITE:
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Function = SYS_CFG_OSC;
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OscillatorId = PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID;
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break;
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case ARM_VE_DAUGHTERBOARD_1_SITE:
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Function = SYS_CFG_OSC_SITE1;
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OscillatorId = FixedPcdGet32 (PcdPL111LcdVideoModeOscId);
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break;
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default:
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return EFI_UNSUPPORTED;
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}
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// Set the video mode oscillator
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Status = ArmPlatformSysConfigSetDevice (
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Function,
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OscillatorId,
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mDisplayModes[ModeNumber].OscFreq
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);
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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// The FVP foundation model does not have an LCD.
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// On the FVP models, the build variant is encoded in bits [15:12].
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// Note: The DVI Mode is not modelled by RTSM or FVP models.
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SysId = MmioRead32 (ARM_VE_SYS_ID_REG);
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if (SysId != ARM_RTSM_SYS_ID) {
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// Ignore build variant and revision.
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SysId &= ~(ARM_FVP_SYS_ID_VARIANT_MASK | ARM_FVP_SYS_ID_REV_MASK);
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if (SysId != ARM_FVP_BASE_BOARD_SYS_ID) {
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// Set the DVI into the new mode
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Status = ArmPlatformSysConfigSet (
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SYS_CFG_DVIMODE,
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mDisplayModes[ModeNumber].Mode
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);
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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}
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}
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// Set the multiplexer
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Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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/** Return information for the requested mode number.
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@param[in] ModeNumber Mode Number.
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@param[out] Info Pointer for returned mode information
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(on success).
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@retval EFI_SUCCESS Mode information for the requested mode
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returned successfully.
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@retval EFI_INVALID_PARAMETER Requested mode not found.
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**/
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EFI_STATUS
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LcdPlatformQueryMode (
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IN UINT32 ModeNumber,
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OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
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)
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{
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ASSERT (Info != NULL);
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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Info->Version = 0;
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Info->HorizontalResolution = mDisplayModes[ModeNumber].Horizontal.Resolution;
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Info->VerticalResolution = mDisplayModes[ModeNumber].Vertical.Resolution;
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Info->PixelsPerScanLine = mDisplayModes[ModeNumber].Horizontal.Resolution;
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Info->PixelFormat = FixedPcdGet32 (PcdGopPixelFormat);
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return EFI_SUCCESS;
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}
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/** Return display timing information for the requested mode number.
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@param[in] ModeNumber Mode Number.
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@param[out] Horizontal Pointer to horizontal timing parameters.
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(Resolution, Sync, Back porch, Front porch)
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@param[out] Vertical Pointer to vertical timing parameters.
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(Resolution, Sync, Back porch, Front porch)
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@retval EFI_SUCCESS Display timing information for the requested
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mode returned successfully.
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@retval EFI_INVALID_PARAMETER Requested mode not found.
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**/
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EFI_STATUS
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LcdPlatformGetTimings (
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IN UINT32 ModeNumber,
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OUT SCAN_TIMINGS ** Horizontal,
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OUT SCAN_TIMINGS ** Vertical
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)
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{
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// One of the pointers is NULL
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ASSERT (Horizontal != NULL);
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ASSERT (Vertical != NULL);
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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*Horizontal = &mDisplayModes[ModeNumber].Horizontal;
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*Vertical = &mDisplayModes[ModeNumber].Vertical;
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return EFI_SUCCESS;
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}
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/** Return bits per pixel information for a mode number.
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@param[in] ModeNumber Mode Number.
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@param[out] Bpp Pointer to bits per pixel information.
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@retval EFI_SUCCESS Bits per pixel information for the requested
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mode returned successfully.
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@retval EFI_INVALID_PARAMETER Requested mode not found.
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**/
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EFI_STATUS
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LcdPlatformGetBpp (
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IN UINT32 ModeNumber,
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OUT LCD_BPP * Bpp
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)
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{
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ASSERT (Bpp != NULL);
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if (ModeNumber >= LcdPlatformGetMaxMode ()) {
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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*Bpp = mDisplayModes[ModeNumber].Bpp;
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return EFI_SUCCESS;
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}
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