/**
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****************************************************************************************
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*
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* @file rwnx_testmode.h
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*
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* @brief Test mode function declarations
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*
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* Copyright (C) RivieraWaves 2012-2019
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*
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****************************************************************************************
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*/
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#ifndef RWNX_TESTMODE_H_
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#define RWNX_TESTMODE_H_
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#include <net/mac80211.h>
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#include <net/netlink.h>
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/* Commands from user space to kernel space(RWNX_TM_CMD_APP2DEV_XX) and
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* from and kernel space to user space(RWNX_TM_CMD_DEV2APP_XX).
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* The command ID is carried with RWNX_TM_ATTR_COMMAND.
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*/
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enum rwnx_tm_cmd_t {
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/* commands from user application to access register */
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RWNX_TM_CMD_APP2DEV_REG_READ = 1,
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RWNX_TM_CMD_APP2DEV_REG_WRITE,
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/* commands from user application to select the Debug levels */
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RWNX_TM_CMD_APP2DEV_SET_DBGMODFILTER,
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RWNX_TM_CMD_APP2DEV_SET_DBGSEVFILTER,
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/* commands to access registers without sending messages to LMAC layer,
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* this must be used when LMAC FW is stuck. */
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RWNX_TM_CMD_APP2DEV_REG_READ_DBG,
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RWNX_TM_CMD_APP2DEV_REG_WRITE_DBG,
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RWNX_TM_CMD_MAX,
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};
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enum rwnx_tm_attr_t {
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RWNX_TM_ATTR_NOT_APPLICABLE = 0,
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RWNX_TM_ATTR_COMMAND,
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/* When RWNX_TM_ATTR_COMMAND is RWNX_TM_CMD_APP2DEV_REG_XXX,
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* The mandatory fields are:
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* RWNX_TM_ATTR_REG_OFFSET for the offset of the target register;
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* RWNX_TM_ATTR_REG_VALUE32 for value */
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RWNX_TM_ATTR_REG_OFFSET,
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RWNX_TM_ATTR_REG_VALUE32,
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/* When RWNX_TM_ATTR_COMMAND is RWNX_TM_CMD_APP2DEV_SET_DBGXXXFILTER,
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* The mandatory field is RWNX_TM_ATTR_REG_FILTER. */
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RWNX_TM_ATTR_REG_FILTER,
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RWNX_TM_ATTR_MAX,
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};
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/***********************************************************************/
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int rwnx_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb);
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int rwnx_testmode_dbg_filter(struct ieee80211_hw *hw, struct nlattr **tb);
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int rwnx_testmode_reg_dbg(struct ieee80211_hw *hw, struct nlattr **tb);
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#endif /* RWNX_TESTMODE_H_ */
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