/**
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******************************************************************************
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*
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* rwnx_cmds.h
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*
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* Copyright (C) RivieraWaves 2014-2019
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*
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******************************************************************************
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*/
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#ifndef _RWNX_CMDS_H_
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#define _RWNX_CMDS_H_
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#include <linux/spinlock.h>
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#include <linux/completion.h>
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#include <linux/module.h>
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#include "lmac_msg.h"
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#ifdef CONFIG_RWNX_SDM
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#define RWNX_80211_CMD_TIMEOUT_MS (20 * 300)
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#elif defined(CONFIG_RWNX_FHOST)
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#define RWNX_80211_CMD_TIMEOUT_MS (10000)
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#else
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#ifdef AICWF_USB_SUPPORT
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#define RWNX_80211_CMD_TIMEOUT_MS 2000//300
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#else
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#define RWNX_80211_CMD_TIMEOUT_MS 3000//500//300
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#endif
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#endif
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#define RWNX_CMD_FLAG_NONBLOCK BIT(0)
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#define RWNX_CMD_FLAG_REQ_CFM BIT(1)
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#define RWNX_CMD_FLAG_WAIT_PUSH BIT(2)
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#define RWNX_CMD_FLAG_WAIT_ACK BIT(3)
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#define RWNX_CMD_FLAG_WAIT_CFM BIT(4)
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#define RWNX_CMD_FLAG_DONE BIT(5)
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/* ATM IPC design makes it possible to get the CFM before the ACK,
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* otherwise this could have simply been a state enum */
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#define RWNX_CMD_WAIT_COMPLETE(flags) \
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(!(flags & (RWNX_CMD_FLAG_WAIT_ACK | RWNX_CMD_FLAG_WAIT_CFM)))
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#define RWNX_CMD_MAX_QUEUED 16
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#ifdef CONFIG_RWNX_FHOST
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#include "ipc_fhost.h"
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#define rwnx_cmd_e2amsg ipc_fhost_msg
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#define rwnx_cmd_a2emsg ipc_fhost_msg
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#define RWNX_CMD_A2EMSG_LEN(m) (m->param_len)
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#define RWNX_CMD_E2AMSG_LEN_MAX IPC_FHOST_MSG_BUF_SIZE
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struct rwnx_term_stream;
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#else /* !CONFIG_RWNX_FHOST*/
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#include "ipc_shared.h"
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#define rwnx_cmd_e2amsg ipc_e2a_msg
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#define rwnx_cmd_a2emsg lmac_msg
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#define RWNX_CMD_A2EMSG_LEN(m) (sizeof(struct lmac_msg) + m->param_len)
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#define RWNX_CMD_E2AMSG_LEN_MAX (IPC_E2A_MSG_PARAM_SIZE * 4)
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#endif /* CONFIG_RWNX_FHOST*/
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struct rwnx_hw;
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struct rwnx_cmd;
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typedef int (*msg_cb_fct)(struct rwnx_hw *rwnx_hw, struct rwnx_cmd *cmd,
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struct rwnx_cmd_e2amsg *msg);
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static inline void put_u16(u8 *buf, u16 data)
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{
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buf[0] = (u8)(data&0x00ff);
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buf[1] = (u8)((data >> 8)&0x00ff);
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}
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enum rwnx_cmd_mgr_state {
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RWNX_CMD_MGR_STATE_DEINIT,
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RWNX_CMD_MGR_STATE_INITED,
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RWNX_CMD_MGR_STATE_CRASHED,
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};
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struct rwnx_cmd {
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struct list_head list;
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lmac_msg_id_t id;
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lmac_msg_id_t reqid;
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struct rwnx_cmd_a2emsg *a2e_msg;
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char *e2a_msg;
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u32 tkn;
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u16 flags;
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struct completion complete;
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u32 result;
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u8 used;
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int array_id;
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#ifdef CONFIG_RWNX_FHOST
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struct rwnx_term_stream *stream;
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#endif
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};
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struct rwnx_cmd_mgr {
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enum rwnx_cmd_mgr_state state;
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spinlock_t lock;
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u32 next_tkn;
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u32 queue_sz;
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u32 max_queue_sz;
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struct list_head cmds;
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int (*queue)(struct rwnx_cmd_mgr *, struct rwnx_cmd *);
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int (*llind)(struct rwnx_cmd_mgr *, struct rwnx_cmd *);
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int (*msgind)(struct rwnx_cmd_mgr *, struct rwnx_cmd_e2amsg *, msg_cb_fct);
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void (*print)(struct rwnx_cmd_mgr *);
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void (*drain)(struct rwnx_cmd_mgr *);
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struct work_struct cmdWork;
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struct workqueue_struct *cmd_wq;
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};
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#define WAKE_CMD_WORK(cmd_mgr) \
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do { \
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queue_work((cmd_mgr)->cmd_wq, &cmd_mgr->cmdWork); \
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} while (0)
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void rwnx_cmd_mgr_init(struct rwnx_cmd_mgr *cmd_mgr);
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void rwnx_cmd_mgr_deinit(struct rwnx_cmd_mgr *cmd_mgr);
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int cmd_mgr_queue_force_defer(struct rwnx_cmd_mgr *cmd_mgr, struct rwnx_cmd *cmd);
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void aicwf_set_cmd_tx(void *dev, struct lmac_msg *msg, uint len);
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#endif /* _RWNX_CMDS_H_ */
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