/** @file
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Secondary System Description Table (SSDT) for SynQuacer PCIe RCs
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Copyright (c) 2014-2016, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Platform/MemoryMap.h>
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#include <Platform/Pcie.h>
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#include "AcpiTables.h"
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DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR",
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EFI_ACPI_OEM_REVISION)
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{
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Scope (_SB)
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{
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Device (PCI0)
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{
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Name (_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
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Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
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Name (_SEG, 0) // PCI Segment Group number
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Name (_BBN, Zero) // PCI Base Bus Number
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Name (_CCA, 1) // Cache Coherency Attribute
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OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG0_CONFIG_BASE, 0x10000)
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Field (BDF1, DWordAcc, NoLock, Preserve) {
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Offset (0x8000),
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VPID, 16,
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}
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OperationRegion (GPIO, SystemMemory, SYNQUACER_GPIO_BASE, 8)
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Field (GPIO, DWordAcc, NoLock, Preserve) {
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, 39,
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PRDT, 1,
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, 24,
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}
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Method (_STA, 0x0, Serialized) {
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If (!LEqual (FixedPcdGet8 (PcdPcie0PresenceDetectGpioPin), 0xff)) {
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Store (PRDT, local0)
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If (!LEqual (local0, 0x0)) {
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Return (0x0)
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}
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}
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//
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// Check whether the VID/PID of device #1 on bus #0 equals 0xffff.
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// If this is not the case, we are dealing with a ghost device,
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// which means we are running with outdated SCP firmware and we
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// should keep this PCIe RC disabled.
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//
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Store (VPID, local1)
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If (!LEqual (local1, 0xffff)) {
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Return (0x0)
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}
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Return (0xf)
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}
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// PCI Routing Table
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Name (_PRT, Package () {
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Package () { 0xFFFF, 0, Zero, 222 }, // INTA
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Package () { 0xFFFF, 1, Zero, 222 }, // INTB
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Package () { 0xFFFF, 2, Zero, 222 }, // INTC
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Package () { 0xFFFF, 3, Zero, 222 }, // INTD
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})
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// Root complex resources
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Method (_CRS, 0, Serialized) {
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Name (RBUF, ResourceTemplate () {
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WordBusNumber ( // Bus numbers assigned to this root
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ResourceProducer,
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MinFixed, MaxFixed, PosDecode,
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0, // AddressGranularity
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SYNQUACER_PCI_SEG0_BUSNUM_MIN, // Minimum Bus Number
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SYNQUACER_PCI_SEG0_BUSNUM_MAX, // Maximum Bus Number
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0, // AddressTranslation
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SYNQUACER_PCI_SEG0_BUSNUM_RANGE // RangeLength - # of Busses
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)
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QWordMemory ( // 32-bit BAR Windows
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ResourceProducer, PosDecode,
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MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, // Granularity
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SYNQUACER_PCI_SEG0_MMIO32_MIN, // Min Base Address
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SYNQUACER_PCI_SEG0_MMIO32_MAX, // Max Base Address
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SYNQUACER_PCI_SEG0_MMIO32_XLATE, // Translate
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SYNQUACER_PCI_SEG0_MMIO32_SIZE // Length
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)
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QWordMemory ( // 64-bit BAR Windows
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ResourceProducer, PosDecode,
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MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, // Granularity
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SYNQUACER_PCI_SEG0_MMIO64_MIN, // Min Base Address
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SYNQUACER_PCI_SEG0_MMIO64_MAX, // Max Base Address
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0x00000000, // Translate
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SYNQUACER_PCI_SEG0_MMIO64_SIZE // Length
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)
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DWordIo ( // IO window
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ResourceProducer,
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MinFixed,
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MaxFixed,
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PosDecode,
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EntireRange,
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0x00000000, // Granularity
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SYNQUACER_PCI_SEG0_PORTIO_MIN, // Min Base Address
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SYNQUACER_PCI_SEG0_PORTIO_MAX, // Max Base Address
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SYNQUACER_PCI_SEG0_PORTIO_MEMBASE, // Translate
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SYNQUACER_PCI_SEG0_PORTIO_MEMSIZE, // Length
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,
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,
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,
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TypeTranslation
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)
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}) // Name (RBUF)
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Return (RBUF)
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} // Method(_CRS)
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Device (RES0)
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{
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Name (_HID, "PNP0C02")
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Name (_CRS, ResourceTemplate ()
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{
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Memory32Fixed (ReadWrite,
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SYNQUACER_PCI_SEG0_CONFIG_BASE,
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SYNQUACER_PCI_SEG0_CONFIG_SIZE)
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})
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}
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//
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// OS Control Handoff
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//
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Name (SUPP, Zero) // PCI _OSC Support Field value
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Name (CTRL, Zero) // PCI _OSC Control Field value
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Method(_OSC,4)
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{
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// Check for proper UUID
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If (LEqual (Arg0, ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
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{
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// Create DWord-adressable fields from the Capabilities Buffer
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CreateDWordField (Arg3, 0, CDW1)
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CreateDWordField (Arg3, 4, CDW2)
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CreateDWordField (Arg3, 8, CDW3)
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// Save Capabilities DWord2 & 3
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Store (CDW2, SUPP)
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Store (CDW3, CTRL)
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// Disable PCIe and SHPC hotplug, AER and PME
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And (CTRL, 0x10, CTRL)
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// Capabilities bits were masked
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Or (CDW1, 0x10, CDW1)
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// Update DWORD3 in the buffer
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Store (CTRL, CDW3)
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Return (Arg3)
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} Else {
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Or (CDW1, 4, CDW1) // Unrecognized UUID
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Return (Arg3)
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}
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} // End _OSC
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} // PCI0
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Device (PCI1)
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{
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Name (_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
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Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
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Name (_SEG, 1) // PCI Segment Group number
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Name (_BBN, Zero) // PCI Base Bus Number
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Name (_CCA, 1) // Cache Coherency Attribute
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OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG1_CONFIG_BASE, 0x10000)
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Field (BDF1, DWordAcc, NoLock, Preserve) {
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Offset (0x8000),
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VPID, 16,
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}
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Method (_STA, 0x0, Serialized) {
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//
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// Check whether the VID/PID of device #1 on bus #0 equals 0xffff.
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// If this is not the case, we are dealing with a ghost device,
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// which means we are running with outdated SCP firmware and we
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// should keep this PCIe RC disabled.
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//
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Store (VPID, local1)
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If (!LEqual (local1, 0xffff)) {
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Return (0x0)
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}
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Return (0xf)
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}
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// PCI Routing Table
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Name (_PRT, Package () {
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Package () { 0xFFFF, 0, Zero, 214 }, // INTA
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Package () { 0xFFFF, 1, Zero, 214 }, // INTB
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Package () { 0xFFFF, 2, Zero, 214 }, // INTC
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Package () { 0xFFFF, 3, Zero, 214 }, // INTD
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})
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// Root complex resources
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Method (_CRS, 0, Serialized) {
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Name (RBUF, ResourceTemplate () {
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WordBusNumber ( // Bus numbers assigned to this root
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ResourceProducer,
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MinFixed, MaxFixed, PosDecode,
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0, // AddressGranularity
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SYNQUACER_PCI_SEG1_BUSNUM_MIN, // Minimum Bus Number
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SYNQUACER_PCI_SEG1_BUSNUM_MAX, // Maximum Bus Number
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0, // AddressTranslation
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SYNQUACER_PCI_SEG1_BUSNUM_RANGE // RangeLength - # of Busses
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)
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QWordMemory ( // 32-bit BAR Windows
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ResourceProducer, PosDecode,
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MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, // Granularity
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SYNQUACER_PCI_SEG1_MMIO32_MIN, // Min Base Address
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SYNQUACER_PCI_SEG1_MMIO32_MAX, // Max Base Address
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SYNQUACER_PCI_SEG1_MMIO32_XLATE, // Translate
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SYNQUACER_PCI_SEG1_MMIO32_SIZE // Length
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)
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QWordMemory ( // 64-bit BAR Windows
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ResourceProducer, PosDecode,
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MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, // Granularity
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SYNQUACER_PCI_SEG1_MMIO64_MIN, // Min Base Address
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SYNQUACER_PCI_SEG1_MMIO64_MAX, // Max Base Address
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0x00000000, // Translate
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SYNQUACER_PCI_SEG1_MMIO64_SIZE // Length
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)
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DWordIo ( // IO window
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ResourceProducer,
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MinFixed,
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MaxFixed,
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PosDecode,
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EntireRange,
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0x00000000, // Granularity
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SYNQUACER_PCI_SEG1_PORTIO_MIN, // Min Base Address
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SYNQUACER_PCI_SEG1_PORTIO_MAX, // Max Base Address
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SYNQUACER_PCI_SEG1_PORTIO_MEMBASE, // Translate
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SYNQUACER_PCI_SEG1_PORTIO_MEMSIZE, // Length
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,
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,
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,
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TypeTranslation
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)
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}) // Name (RBUF)
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Return (RBUF)
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} // Method(_CRS)
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Device (RES0)
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{
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Name (_HID, "PNP0C02")
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Name (_CRS, ResourceTemplate ()
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{
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Memory32Fixed (ReadWrite,
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SYNQUACER_PCI_SEG1_CONFIG_BASE,
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SYNQUACER_PCI_SEG1_CONFIG_SIZE)
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})
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}
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//
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// OS Control Handoff
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//
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Name (SUPP, Zero) // PCI _OSC Support Field value
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Name (CTRL, Zero) // PCI _OSC Control Field value
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Method(_OSC,4)
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{
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// Check for proper UUID
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If (LEqual (Arg0, ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
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{
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// Create DWord-adressable fields from the Capabilities Buffer
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CreateDWordField (Arg3, 0, CDW1)
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CreateDWordField (Arg3, 4, CDW2)
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CreateDWordField (Arg3, 8, CDW3)
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// Save Capabilities DWord2 & 3
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Store (CDW2, SUPP)
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Store (CDW3, CTRL)
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// Disable PCIe and SHPC hotplug, AER and PME
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And (CTRL, 0x10, CTRL)
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// Capabilities bits were masked
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Or (CDW1, 0x10, CDW1)
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// Update DWORD3 in the buffer
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Store (CTRL, CDW3)
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Return (Arg3)
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} Else {
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Or (CDW1, 4, CDW1) // Unrecognized UUID
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Return (Arg3)
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}
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} // End _OSC
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} // PCI0
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}
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}
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