/** @file
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This file contains the descriptor definination of OHCI spec
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Copyright (c) 2013-2015 Intel Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _DESCRIPTOR_H
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#define _DESCRIPTOR_H
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#define ED_FUNC_ADD 0x0001
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#define ED_ENDPT_NUM 0x0002
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#define ED_DIR 0x0004
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#define ED_SPEED 0x0008
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#define ED_SKIP 0x0010
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#define ED_FORMAT 0x0020
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#define ED_MAX_PACKET 0x0040
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#define ED_TDTAIL_PTR 0x0080
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#define ED_HALTED 0x0100
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#define ED_DTTOGGLE 0x0200
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#define ED_TDHEAD_PTR 0x0400
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#define ED_NEXT_EDPTR 0x0800
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#define ED_PDATA 0x1000
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#define ED_ZERO 0x2000
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#define TD_BUFFER_ROUND 0x0001
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#define TD_DIR_PID 0x0002
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#define TD_DELAY_INT 0x0004
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#define TD_DT_TOGGLE 0x0008
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#define TD_ERROR_CNT 0x0010
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#define TD_COND_CODE 0x0020
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#define TD_CURR_BUFFER_PTR 0x0040
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#define TD_NEXT_PTR 0x0080
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#define TD_BUFFER_END_PTR 0x0100
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#define TD_PDATA 0x0200
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#define ED_FROM_TD_DIR 0x0
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#define ED_OUT_DIR 0x1
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#define ED_IN_DIR 0x2
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#define ED_FROM_TD_ALSO_DIR 0x3
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#define TD_SETUP_PID 0x00
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#define TD_OUT_PID 0x01
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#define TD_IN_PID 0x02
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#define TD_NODATA_PID 0x03
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#define HI_SPEED 0
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#define LO_SPEED 1
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#define TD_NO_ERROR 0x00
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#define TD_CRC_ERROR 0x01
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#define TD_BITSTUFFING_ERROR 0x02
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#define TD_TOGGLE_ERROR 0x03
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#define TD_DEVICE_STALL 0x04
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#define TD_NO_RESPONSE 0x05
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#define TD_PIDCHK_FAIL 0x06
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#define TD_PID_UNEXPECTED 0x07
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#define TD_DATA_OVERRUN 0x08
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#define TD_DATA_UNDERRUN 0x09
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#define TD_BUFFER_OVERRUN 0x0C
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#define TD_BUFFER_UNDERRUN 0x0D
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#define TD_TOBE_PROCESSED 0x0E
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#define TD_TOBE_PROCESSED_2 0x0F
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#define TD_NO_DELAY 0x7
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#define TD_INT 0x1
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#define TD_CTL 0x2
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#define TD_BLK 0x3
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typedef struct {
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UINT32 Reserved:18;
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UINT32 BufferRounding:1;
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UINT32 DirPID:2;
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UINT32 DelayInterrupt:3;
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UINT32 DataToggle:2;
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UINT32 ErrorCount:2;
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UINT32 ConditionCode:4;
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} TD_DESCRIPTOR_WORD0;
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typedef struct _TD_DESCRIPTOR {
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TD_DESCRIPTOR_WORD0 Word0;
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UINT32 CurrBufferPointer; // 32-bit Physical Address of buffer
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UINT32 NextTD; // 32-bit Physical Address of TD_DESCRIPTOR
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UINT32 BufferEndPointer; // 32-bit Physical Address of buffer
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UINT32 NextTDPointer; // 32-bit Physical Address of TD_DESCRIPTOR
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UINT32 DataBuffer; // 32-bit Physical Address of buffer
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UINT32 ActualSendLength;
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UINT32 Reserved;
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} TD_DESCRIPTOR;
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typedef struct {
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UINT32 FunctionAddress:7;
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UINT32 EndPointNum:4;
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UINT32 Direction:2;
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UINT32 Speed:1;
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UINT32 Skip:1;
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UINT32 Format:1;
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UINT32 MaxPacketSize:11;
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UINT32 FreeSpace:5;
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} ED_DESCRIPTOR_WORD0;
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typedef struct {
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UINT32 Halted:1;
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UINT32 ToggleCarry:1;
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UINT32 Zero:2;
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UINT32 TdHeadPointer:28;
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} ED_DESCRIPTOR_WORD2;
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typedef struct _ED_DESCRIPTOR {
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ED_DESCRIPTOR_WORD0 Word0;
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UINT32 TdTailPointer; // 32-bit Physical Address of TD_DESCRIPTOR
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ED_DESCRIPTOR_WORD2 Word2;
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UINT32 NextED; // 32-bit Physical Address of ED_DESCRIPTOR
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} ED_DESCRIPTOR;
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#define TD_PTR(p) ((TD_DESCRIPTOR *)(UINTN)((p) << 4))
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#define ED_PTR(p) ((ED_DESCRIPTOR *)(UINTN)((p) << 4))
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#define RIGHT_SHIFT_4(p) ((UINT32)(p) >> 4)
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typedef enum {
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CONTROL_LIST,
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BULK_LIST,
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INTERRUPT_LIST,
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ISOCHRONOUS_LIST
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} DESCRIPTOR_LIST_TYPE;
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#endif
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