/** @file
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This driver installs SMBIOS information for Phytium Durian platforms.
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Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <IndustryStandard/SmBios.h>
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#include <Library/DebugLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Platform.h>
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#include <Protocol/Smbios.h>
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// SMBIOS tables often reference each other using
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// fixed constants, define a list of these constants
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// for our hardcoded tables
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#define TYPE0_STRINGS \
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"PHYTIUM LTD\0" /* Vendor */ \
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"V1.0\0" /* BiosVersion */ \
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__DATE__"\0" /* BiosReleaseDate */
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#define TYPE1_STRINGS \
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"PHYTIUM LTD\0" /* Manufacturer */ \
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"Phytium Durian Development Platform\0" /* Product Name */ \
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"None\0" /* Version */ \
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"Not Set\0" /* SerialNumber */ \
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"Not set\0" /* SKUNumber */ \
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"FT-2000/4\0" /* Family */ \
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#define TYPE2_STRINGS \
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"PHYTIUM LTD\0" /* Manufacturer */ \
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"Phytium Durian Development Platform\0" /* Product Name */ \
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"None\0" /* Version */ \
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"Not Set\0" /* Serial */ \
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"Not Set\0" /* BaseBoardAssetTag */ \
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"Not Set\0" /* BaseBoardChassisLocation */
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#define TYPE3_STRINGS \
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"PHYTIUM LTD\0" /* Manufacturer */ \
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"None\0" /* Version */ \
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"Not Set\0" /* Serial */ \
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"Not Set\0" /* AssetTag */
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#define TYPE4_STRINGS \
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"FT-2000/4\0" /* socket type */ \
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"PHYTIUM LTD\0" /* manufactuer */ \
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"FT-2000/4\0" /* processor version */ \
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"Not Set\0" /* SerialNumber */ \
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"Not Set\0" /* processor 2 description */ \
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"Not Set\0" /* AssetTag */
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#define TYPE7_STRINGS \
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"L1 Instruction\0" /* L1I */ \
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"L1 Data\0" /* L1D */ \
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"L2\0" /* L2 */
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#define TYPE7_L1DATA_STRINGS \
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"L1 Data Cache\0" /* L1 data */
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#define TYPE7_L1INS_STRINGS \
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"L1 Instruction Cache\0" /* L1 ins */
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#define TYPE7_L2_STRINGS \
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"L2 Cache\0" /* L2 */
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#define TYPE7_L3_STRINGS \
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"L3 Cache\0" /* L3 */
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#define TYPE9_STRINGS \
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"PCIE_SLOT0\0" /* Slot0 */ \
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"PCIE_SLOT1\0" /* Slot1 */ \
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"PCIE_SLOT2\0" /* Slot2 */ \
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"PCIE_SLOT3\0" /* Slot3 */
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#define TYPE9_STRINGS_PCIE0X16 \
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"PCIE0_X16\0"
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#define TYPE9_STRINGS_PCIE0X1 \
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"PCIE0_X1\0"
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#define TYPE9_STRINGS_PCIE1X16 \
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"PCIE1_X16\0"
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#define TYPE9_STRINGS_PCIE1X1 \
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"PCIE1_X1\0"
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#define TYPE13_STRINGS \
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"en|US|iso8859-1\0" \
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"zh|CN|unicode\0"
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#define TYPE16_STRINGS \
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"\0" /* nothing */
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#define TYPE17_STRINGS_CHANNEL0 \
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"SOCKET 0 CHANNEL 0 DIMM 0\0" /* location */ \
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"Bank0\0" /* bank description */ \
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"Not Set\0" \
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"Not Set\0" \
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"Not Set\0" \
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"Not Set\0"
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#define TYPE17_STRINGS_CHANNEL1 \
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"SOCKET 0 CHANNEL 1 DIMM 0\0" /* location */ \
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"Bank0\0" \
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"Not Set\0" \
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"Not Set\0" \
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"Not Set\0" \
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"Not Set\0"
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#define TYPE19_STRINGS \
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"\0" /* nothing */
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#define TYPE32_STRINGS \
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"\0" /* nothing */
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#define TYPE39_STRINGS \
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"Not specified\0" /* not specified*/ \
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"Not specified\0" /* not specified*/ \
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"Not specified\0" /* not specified*/ \
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"Not specified\0" /* not specified*/ \
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"Not specified\0" /* not specified*/ \
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"Not specified\0" /* not specified*/ \
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"Not specified\0" /* not specified*/
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#define TYPE38_STRINGS \
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"\0"
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//
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// Type definition and contents of the default SMBIOS table.
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// This table covers only the minimum structures required by
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// the SMBIOS specification (section 6.2, version 3.0)
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//
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#pragma pack(1)
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typedef struct {
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SMBIOS_TABLE_TYPE0 Base;
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INT8 Strings[sizeof (TYPE0_STRINGS)];
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} ARM_TYPE0;
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typedef struct {
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SMBIOS_TABLE_TYPE1 Base;
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UINT8 Strings[sizeof (TYPE1_STRINGS)];
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} ARM_TYPE1;
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typedef struct {
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SMBIOS_TABLE_TYPE2 Base;
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UINT8 Strings[sizeof (TYPE2_STRINGS)];
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} ARM_TYPE2;
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typedef struct {
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SMBIOS_TABLE_TYPE3 Base;
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UINT8 Strings[sizeof (TYPE3_STRINGS)];
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} ARM_TYPE3;
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typedef struct {
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SMBIOS_TABLE_TYPE4 Base;
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UINT8 Strings[sizeof (TYPE4_STRINGS)];
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} ARM_TYPE4;
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typedef struct {
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SMBIOS_TABLE_TYPE7 Base;
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UINT8 Strings[sizeof (TYPE7_L1DATA_STRINGS)];
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} ARM_TYPE7_L1DATA;
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typedef struct {
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SMBIOS_TABLE_TYPE7 Base;
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UINT8 Strings[sizeof (TYPE7_L1INS_STRINGS)];
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} ARM_TYPE7_L1INS;
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typedef struct {
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SMBIOS_TABLE_TYPE7 Base;
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UINT8 Strings[sizeof (TYPE7_L2_STRINGS)];
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} ARM_TYPE7_L2;
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typedef struct {
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SMBIOS_TABLE_TYPE7 Base;
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UINT8 Strings[sizeof (TYPE7_L3_STRINGS)];
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} ARM_TYPE7_L3;
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typedef struct {
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SMBIOS_TABLE_TYPE9 Base;
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UINT8 Strings[sizeof (TYPE9_STRINGS)];
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} ARM_TYPE9;
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typedef struct {
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SMBIOS_TABLE_TYPE9 Base;
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UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE0X16)];
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} ARM_TYPE9_PCIE0X16;
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typedef struct {
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SMBIOS_TABLE_TYPE9 Base;
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UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE0X1)];
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} ARM_TYPE9_PCIE0X1;
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typedef struct {
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SMBIOS_TABLE_TYPE9 Base;
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UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE1X16)];
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} ARM_TYPE9_PCIE1X16;
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typedef struct {
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SMBIOS_TABLE_TYPE9 Base;
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UINT8 Strings[sizeof (TYPE9_STRINGS_PCIE1X1)];
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} ARM_TYPE9_PCIE1X1;
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typedef struct {
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SMBIOS_TABLE_TYPE13 Base;
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UINT8 Strings[sizeof (TYPE13_STRINGS)];
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} ARM_TYPE13;
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typedef struct {
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SMBIOS_TABLE_TYPE16 Base;
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UINT8 Strings[sizeof (TYPE16_STRINGS)];
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} ARM_TYPE16;
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typedef struct {
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SMBIOS_TABLE_TYPE17 Base;
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UINT8 Strings[sizeof (TYPE17_STRINGS_CHANNEL0)];
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} ARM_TYPE17_CHANNEL0;
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typedef struct {
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SMBIOS_TABLE_TYPE17 Base;
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UINT8 Strings[sizeof (TYPE17_STRINGS_CHANNEL1)];
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} ARM_TYPE17_CHANNEL1;
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typedef struct {
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SMBIOS_TABLE_TYPE19 Base;
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UINT8 Strings[sizeof (TYPE19_STRINGS)];
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} ARM_TYPE19;
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typedef struct {
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SMBIOS_TABLE_TYPE32 Base;
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UINT8 Strings[sizeof (TYPE32_STRINGS)];
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} ARM_TYPE32;
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typedef struct {
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SMBIOS_TABLE_TYPE38 Base;
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UINT8 Strings[sizeof (TYPE38_STRINGS)];
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} ARM_TYPE38;
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typedef struct {
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SMBIOS_TABLE_TYPE39 Base;
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UINT8 Strings[sizeof (TYPE39_STRINGS)];
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} ARM_TYPE39;
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enum SMBIOS_REFRENCE_HANDLES {
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SMBIOS_HANDLE_L1I = 0x1000,
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SMBIOS_HANDLE_L1D,
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SMBIOS_HANDLE_L2,
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SMBIOS_HANDLE_L3,
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SMBIOS_HANDLE_MOTHERBOARD,
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SMBIOS_HANDLE_CHASSIS,
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SMBIOS_HANDLE_CLUSTER,
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SMBIOS_HANDLE_MEMORY,
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SMBIOS_HANDLE_DIMM_0,
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SMBIOS_HANDLE_DIMM_1
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};
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#define SERIAL_LEN 10 //this must be less than the buffer len allocated in the type1 structure
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#pragma pack()
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//BIOS Information (Type 0)
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ARM_TYPE0 BiosInfo_Type0 = {
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{
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{ // SMBIOS_STRUCTURE Hdr
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EFI_SMBIOS_TYPE_BIOS_INFORMATION, // UINT8 Type
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sizeof (SMBIOS_TABLE_TYPE0), // UINT8 Length
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SMBIOS_HANDLE_PI_RESERVED
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},
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1, //Vendor
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2, //BiosVersion
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0x8800, //BiosSegment
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3, //BiosReleaseDate
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0xFF, //BiosSize
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{ //BiosCharacteristics
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0, // Reserved :2
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0, // Unknown :1
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0, // BiosCharacteristicsNotSupported :1
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0, // IsaIsSupported :1
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0, // McaIsSupported :1
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0, // EisaIsSupported :1
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1, // PciIsSupported :1
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0, // PcmciaIsSupported :1
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0, // PlugAndPlayIsSupported :1
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0, // ApmIsSupported :1
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1, // BiosIsUpgradable :1
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0, // BiosShadowingAllowed :1
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0, // VlVesaIsSupported :1
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0, // EscdSupportIsAvailable :1
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1, // BootFromCdIsSupported :1
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1, // SelectableBootIsSupported :1
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0, // RomBiosIsSocketed :1
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0, // BootFromPcmciaIsSupported :1
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0, // EDDSpecificationIsSupported :1
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0, // JapaneseNecFloppyIsSupported :1
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0, // JapaneseToshibaFloppyIsSupported :1
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0, // Floppy525_360IsSupported :1
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0, // Floppy525_12IsSupported :1
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0, // Floppy35_720IsSupported :1
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0, // Floppy35_288IsSupported :1
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0, // PrintScreenIsSupported :1
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0, // Keyboard8042IsSupported :1
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0, // SerialIsSupported :1
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0, // PrinterIsSupported :1
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0, // CgaMonoIsSupported :1
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0, // NecPc98 :1
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0 // ReservedForVendor :3
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},
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{
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0x03, //BIOSCharacteristicsExtensionBytes[0]
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0x0D //BIOSCharacteristicsExtensionBytes[1]
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},
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0xFF, //SystemBiosMajorRelease;
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0xFF, //SystemBiosMinorRelease;
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0xFF, //EmbeddedControllerFirmwareMajorRelease;
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0xFF, //EmbeddedControllerFirmwareMinorRelease;
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},
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TYPE0_STRINGS
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};
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//System Information (Type 1).
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ARM_TYPE1 SystemInfo_Type1 = {
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{
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{ // Hdr
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EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, // Type,
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sizeof (SMBIOS_TABLE_TYPE1), // UINT8 Length
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SMBIOS_HANDLE_PI_RESERVED // Handle
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},
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1, // Manufacturer
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2, // ProductName
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3, // Version
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4, // SerialNumber
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{ // Uuid
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0x12345678, 0x1234, 0x5678, {0x90, 0xab, 0xcd, 0xde, 0xef, 0xaa, 0xbb, 0xcc}
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},
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SystemWakeupTypePowerSwitch, // SystemWakeupType
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5, // SKUNumber,
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6 // Family
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},
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TYPE1_STRINGS
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};
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//Base Board (or Module) Information (Type 2)
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ARM_TYPE2 BaseboardInfo_Type2 = {
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{
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{ // Hdr
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EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // Type,
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sizeof (SMBIOS_TABLE_TYPE2), // UINT8 Length
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SMBIOS_HANDLE_MOTHERBOARD // Handle
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},
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1, // BaseBoardManufacturer
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2, // BaseBoardProductName
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3, // BaseBoardVersion
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4, // BaseBoardSerialNumber
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5, // BaseBoardAssetTag
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{ // FeatureFlag
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1, // Motherboard :1
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0, // RequiresDaughterCard :1
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0, // Removable :1
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1, // Replaceable :1
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0, // HotSwappable :1
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0 // Reserved :3
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},
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6, // BaseBoardChassisLocation
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0, // ChassisHandle;
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BaseBoardTypeMotherBoard, // BoardType;
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0, // NumberOfContainedObjectHandles;
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{
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0
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} // ContainedObjectHandles[1];
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},
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TYPE2_STRINGS
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};
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//System Enclosure or Chassis (Type 3)
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ARM_TYPE3 SystemEnclosure_Type3 = {
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{
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{ // Hdr
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EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE , // Type,
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sizeof (SMBIOS_TABLE_TYPE3), // UINT8 Length
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SMBIOS_HANDLE_CHASSIS // Handle
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},
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1, // Manufactrurer
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MiscChassisTypeMainServerChassis, // Type
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2, // Version
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3, // SerialNumber
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4, // AssetTag
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ChassisStateSafe, // BootupState
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ChassisStateSafe, // PowerSupplyState
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ChassisStateSafe, // ThermalState
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ChassisSecurityStatusNone, // SecurityState
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{
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0, // OemDefined[0]
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0, // OemDefined[1]
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0, // OemDefined[2]
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0 // OemDefined[3]
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},
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2, // Height
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1, // NumberofPowerCords
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0, // ContainedElementCount
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0, // ContainedElementRecordLength
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{ // ContainedElements[0]
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{
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0, // ContainedElementType
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0, // ContainedElementMinimum
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0 // ContainedElementMaximum
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}
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}
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},
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TYPE3_STRINGS
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};
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//Processor Infomation (Type 4)
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ARM_TYPE4 ProcessorInfo_Type4 = {
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{
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{ //Header
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EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, //Type
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sizeof (SMBIOS_TABLE_TYPE4), //Length
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SMBIOS_HANDLE_CLUSTER //Handle
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},
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1, //Socket
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CentralProcessor, //ProcessorType
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ProcessorFamilyIndicatorFamily2, //ProcessorFamily
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2, //ProcessorManufacture
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{ //ProcessorId
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{ //Signature
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0
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},
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{ //FeatureFlags
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0
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}
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},
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3, //ProcessorVersion
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{ //Voltage
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0, 0, 0, 1, 0, 1
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},
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1, //ExternalClock
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1, //MaxSpeed
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0, //CurrentSpeed
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0x41, //Status
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ProcessorUpgradeUnknown, //ProcessorUpgrade
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SMBIOS_HANDLE_L1D, //L1Ins
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SMBIOS_HANDLE_L2, //L1Data
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SMBIOS_HANDLE_L3, //L2
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4, //SerialNumber
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5, //AssetTag
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6, //PartNumber
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4, //CoreCount
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0, //EnabledCoreCount
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0, //ThreadCount
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0x00EC, //ProcessorCharacteristics
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ProcessorFamilyARMv8, //ProcessorFamily2
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0, //CoreCount2
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0, //EnabledCoreCount2
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0 //ThreadCount2
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},
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TYPE4_STRINGS
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};
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//Cache Information (Type7) L1 DATA
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ARM_TYPE7_L1DATA L1Data_Type7 = {
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{
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{ //Header
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EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type
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sizeof (SMBIOS_TABLE_TYPE7), //Length
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SMBIOS_HANDLE_L1D //Handle
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},
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1, //SocketDesignation
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0x0180, //CacheConfiguration
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0, //MaximumCacheSize
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0, //InstalledSize
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{ //SupportedSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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{ //CurrentSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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0, //CacheSpeed
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CacheErrorSingleBit, //ErrorCorrectionType
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CacheTypeData, //SystemCacheType
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CacheAssociativity8Way, //Associativity
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128,
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128
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},
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TYPE7_L1DATA_STRINGS
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};
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//Cache Information (Type7) L1 INS
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ARM_TYPE7_L1INS L1Ins_Type7 = {
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{
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{ //Header
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EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type
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sizeof (SMBIOS_TABLE_TYPE7), //Length
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SMBIOS_HANDLE_L1I //Handle
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},
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1, //SocketDesignation
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0x0180, //CacheConfiguration
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0, //MaximumCacheSize
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0, //InstalledSize
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{ //SupportedSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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{ //CurrentSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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0, //CacheSpeed
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CacheErrorParity, //ErrorCorrectionType
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CacheTypeInstruction, //SystemCacheType
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CacheAssociativity8Way, //Associativity
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128,
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128
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},
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TYPE7_L1INS_STRINGS
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};
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//Cache Information (Type7) L2
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ARM_TYPE7_L2 L2_Type7 = {
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{
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{ //Header
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EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type
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sizeof (SMBIOS_TABLE_TYPE7), //Length
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SMBIOS_HANDLE_L2 //Handle
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},
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1, //SocketDesignation
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0x0281, //CacheConfiguration
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0, //MaximumCacheSize
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0, //InstalledSize
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{ //SupportedSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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{ //CurrentSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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0, //CacheSpeed
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CacheErrorSingleBit, //ErrorCorrectionType
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CacheTypeUnified, //SystemCacheType
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CacheAssociativity8Way, //Associativity
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4096,
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4096
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},
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TYPE7_L2_STRINGS
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};
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//Cache Information (Type7) L3
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ARM_TYPE7_L3 L3_Type7 = {
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{
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{ //Header
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EFI_SMBIOS_TYPE_CACHE_INFORMATION, //Type
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sizeof (SMBIOS_TABLE_TYPE7), //Length
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SMBIOS_HANDLE_L3 //Handle
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},
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1, //SocketDesignation
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0x0281, //CacheConfiguration
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0, //MaximumCacheSize
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0, //InstalledSize
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{ //SupportedSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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{ //CurrentSRAMType
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0, 0, 0, 0, 0, 1, 0, 0
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},
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0, //CacheSpeed
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CacheErrorSingleBit, //ErrorCorrectionType
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CacheTypeUnified, //SystemCacheType
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CacheAssociativity8Way, //Associativity
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4096,
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4096
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},
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TYPE7_L3_STRINGS
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};
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//PCIE0_X16 (Type 9)
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ARM_TYPE9_PCIE0X16 Pcie0X16_Type9 = {
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{
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{ // SMBIOS_STRUCTURE Hdr
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EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
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sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
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SMBIOS_HANDLE_PI_RESERVED
|
},
|
1,
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SlotTypePciX,
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SlotDataBusWidth16X,
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SlotUsageInUse,
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SlotLengthLong,
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0,
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{0, 0, 1, 1, 0, 0, 0, 0}, //unknown
|
{1, 0, 0, 0, 0}, //PME and SMBUS
|
0,
|
0,
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0,
|
},
|
TYPE9_STRINGS_PCIE0X16
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};
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//PCIE0_X1 (Type 9)
|
ARM_TYPE9_PCIE0X1 Pcie0X1_Type9 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
|
SMBIOS_HANDLE_PI_RESERVED
|
},
|
1,
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SlotTypePciX,
|
SlotDataBusWidth1X,
|
SlotUsageAvailable,
|
SlotLengthShort,
|
1,
|
{0, 0, 1, 1, 0, 0, 0, 0}, //unknown
|
{1, 0, 0, 0, 0}, //PME and SMBUS
|
0xFF,
|
0xFF,
|
0xFF,
|
},
|
TYPE9_STRINGS_PCIE0X1
|
};
|
|
//PCIE1_X16 (Type 9)
|
ARM_TYPE9_PCIE1X16 Pcie1X16_Type9 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
|
SMBIOS_HANDLE_PI_RESERVED
|
},
|
1,
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SlotTypePciX,
|
SlotDataBusWidth16X,
|
SlotUsageAvailable,
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SlotLengthLong,
|
2,
|
{0, 0, 1, 1, 0, 0, 0, 0}, //unknown
|
{1, 0, 0, 0, 0}, //PME and SMBUS
|
0xFF,
|
0xFF,
|
0xFF,
|
},
|
TYPE9_STRINGS_PCIE1X16
|
};
|
|
//PCIE1_X1 (Type 9)
|
ARM_TYPE9_PCIE1X1 Pcie1X1_Type9 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
|
SMBIOS_HANDLE_PI_RESERVED
|
},
|
1,
|
SlotTypePciX,
|
SlotDataBusWidth1X,
|
SlotUsageAvailable,
|
SlotLengthShort,
|
3,
|
{0, 0, 1, 1, 0, 0, 0, 0}, //unknown
|
{1, 0, 0, 0, 0}, //PME and SMBUS
|
0xFF,
|
0xFF,
|
0xFF,
|
},
|
TYPE9_STRINGS_PCIE1X1
|
};
|
|
//Bios Language Information (Type13)
|
ARM_TYPE13 BiosLangInfo_Type13 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE13), // UINT8 Length
|
SMBIOS_HANDLE_PI_RESERVED
|
},
|
2,
|
0,
|
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
2
|
},
|
TYPE13_STRINGS
|
};
|
|
//Physical Memory Array (Type 16)
|
ARM_TYPE16 MemArray_Type16 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE16), // UINT8 Length
|
SMBIOS_HANDLE_MEMORY
|
},
|
MemoryArrayLocationSystemBoard,
|
MemoryArrayUseSystemMemory,
|
MemoryErrorCorrectionNone,
|
0x1000000, //16G
|
0xFFFE,
|
2
|
},
|
TYPE16_STRINGS
|
};
|
|
//Memory Device (Type17)
|
ARM_TYPE17_CHANNEL0 MemDev_Type17_0 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_MEMORY_DEVICE, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE17), // UINT8 Length
|
SMBIOS_HANDLE_DIMM_0
|
},
|
SMBIOS_HANDLE_MEMORY, //array to which this module belongs
|
0xFFFE, //no errors
|
64, //single DIMM, no ECC is 64bits (for ecc this would be 72)
|
64, //data width of this device (64-bits)
|
0x4000, //16GB
|
0x09, //FormFactor
|
0, //not part of a set
|
1, //right side of board
|
2, //bank 0
|
MemoryTypeDdr4, //LP DDR4
|
{0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, //unbuffered
|
2400, //2400Mhz DDR
|
3, //Manufacturer
|
4, //serial
|
5, //asset tag
|
6, //part number
|
0, //attrbute
|
0x2000, // 8G
|
2400, //2400MHz
|
1500, //Max V
|
1500, //Max V
|
1500, //Configure V
|
},
|
TYPE17_STRINGS_CHANNEL0
|
};
|
|
//Memory Device (Type17)
|
ARM_TYPE17_CHANNEL1 MemDev_Type17_1 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_MEMORY_DEVICE, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE17), // UINT8 Length
|
SMBIOS_HANDLE_DIMM_1
|
},
|
SMBIOS_HANDLE_MEMORY, //array to which this module belongs
|
0xFFFE, //no errors
|
64, //single DIMM, no ECC is 64bits (for ecc this would be 72)
|
64, //data width of this device (64-bits)
|
0x2000, //8GB
|
0x09, //FormFactor
|
0, //not part of a set
|
1, //right side of board
|
2, //bank 0
|
MemoryTypeDdr4, //LP DDR4
|
{0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0}, //unbuffered
|
2400, //2400Mhz DDR
|
3, //varies between diffrent production runs
|
4, //serial
|
5, //asset tag
|
6, //part number
|
0, //attrbute
|
0x4000, // 16G
|
2400, //2400MHz
|
1500, //Max V
|
1500, //Max V
|
1500, //Configure V
|
},
|
TYPE17_STRINGS_CHANNEL1
|
};
|
|
//Memory Array Mapped Address (Type 19)
|
ARM_TYPE19 MemArrayMapAddr_Type19 = {
|
{
|
{ // SMBIOS_STRUCTURE Hdr
|
EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, // UINT8 Type
|
sizeof (SMBIOS_TABLE_TYPE19), // UINT8 Length
|
SMBIOS_HANDLE_PI_RESERVED
|
},
|
0,
|
0x1000000, //16G
|
SMBIOS_HANDLE_MEMORY, //handle
|
2,
|
0, //starting addr of first 2GB
|
0, //ending addr of first 2GB
|
},
|
TYPE19_STRINGS
|
};
|
|
//System Boot Information (Type 32)
|
ARM_TYPE32 SystemBoot_Type32 = {
|
{
|
{
|
EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // Type,
|
sizeof (SMBIOS_TABLE_TYPE32), // UINT8 Length
|
SMBIOS_HANDLE_PI_RESERVED
|
},
|
{ // Reserved[6]
|
0,
|
0,
|
0,
|
0,
|
0,
|
0
|
},
|
BootInformationStatusNoError // BootInformationStatus
|
},
|
TYPE32_STRINGS
|
};
|
|
VOID *DefaultCommonTables[]=
|
{
|
&BiosInfo_Type0,
|
&SystemInfo_Type1,
|
&BaseboardInfo_Type2,
|
&SystemEnclosure_Type3,
|
&ProcessorInfo_Type4,
|
&L1Data_Type7,
|
&L1Ins_Type7,
|
&L2_Type7,
|
&L3_Type7,
|
&Pcie0X16_Type9,
|
&Pcie0X1_Type9,
|
&Pcie1X16_Type9,
|
&Pcie1X1_Type9,
|
&MemArray_Type16,
|
&MemDev_Type17_0,
|
&MemDev_Type17_1,
|
&MemArrayMapAddr_Type19,
|
&BiosLangInfo_Type13,
|
&SystemBoot_Type32,
|
NULL
|
};
|
|
|
/**
|
Installed a whole table worth of structructures.
|
|
@param[in] Smbios The Pointer of Smbios Protocol.
|
|
@retval EFI_SUCCESS Table data successfully installed.
|
@retval Other Table data was not installed.
|
|
**/
|
EFI_STATUS
|
InstallStructures (
|
IN EFI_SMBIOS_PROTOCOL *Smbios,
|
IN VOID *DefaultTables[]
|
)
|
{
|
EFI_STATUS Status;
|
EFI_SMBIOS_HANDLE SmbiosHandle;
|
UINT32 TableEntry;
|
|
Status = EFI_SUCCESS;
|
|
for ( TableEntry =0; DefaultTables[TableEntry] != NULL; TableEntry++)
|
{
|
SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER *)DefaultTables[TableEntry])->Handle;
|
Status = Smbios->Add (
|
Smbios,
|
NULL,
|
&SmbiosHandle,
|
(EFI_SMBIOS_TABLE_HEADER *) DefaultTables[TableEntry]
|
);
|
if (EFI_ERROR (Status))
|
break;
|
}
|
|
return Status;
|
}
|
|
|
/**
|
Installed All SMBIOS information.
|
|
@param[in] Smbios The Pointer of Smbios Protocol.
|
|
@retval EFI_SUCCESS SMBIOS information successfully installed.
|
@retval Other SMBIOS information was not installed.
|
|
**/
|
STATIC
|
EFI_STATUS
|
InstallAllStructures (
|
IN EFI_SMBIOS_PROTOCOL *Smbios
|
)
|
{
|
EFI_STATUS Status;
|
|
Status = EFI_SUCCESS;
|
|
Status = InstallStructures (Smbios, DefaultCommonTables);
|
ASSERT_EFI_ERROR (Status);
|
|
return Status;
|
}
|
|
|
/**
|
Find the smbios protocol and installed SMBIOS information
|
for ARM platforms.
|
|
@param[in] ImageHandle Module's image handle.
|
@param[in] SystemTable Pointer of EFI_SYSTEM_TABLE.
|
|
@retval EFI_SUCCESS Smbios data successfully installed.
|
@retval Other Smbios data was not installed.
|
|
**/
|
EFI_STATUS
|
EFIAPI
|
SmbiosTablePublishEntry (
|
IN EFI_HANDLE ImageHandle,
|
IN EFI_SYSTEM_TABLE *SystemTable
|
)
|
{
|
EFI_STATUS Status;
|
EFI_SMBIOS_PROTOCOL *Smbios;
|
|
//
|
// Find the SMBIOS protocol
|
//
|
Status = gBS->LocateProtocol (
|
&gEfiSmbiosProtocolGuid,
|
NULL,
|
(VOID **)&Smbios
|
);
|
if (EFI_ERROR (Status)) {
|
return Status;
|
}
|
|
Status = InstallAllStructures (Smbios);
|
|
return Status;
|
}
|
