/********************************************************************************
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Copyright (C) 2016 Marvell International Ltd.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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*******************************************************************************/
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#include "UtmiPhyLib.h"
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typedef struct {
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EFI_PHYSICAL_ADDRESS UtmiPllAddr;
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EFI_PHYSICAL_ADDRESS UtmiBaseAddr;
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EFI_PHYSICAL_ADDRESS UsbCfgAddr;
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EFI_PHYSICAL_ADDRESS UtmiCfgAddr;
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UINT32 UtmiPhyPort;
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UINT32 PhyId;
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} UTMI_PHY_DATA;
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STATIC
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VOID
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RegSetSilent (
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IN EFI_PHYSICAL_ADDRESS Addr,
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IN UINT32 Data,
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IN UINT32 Mask
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)
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{
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UINT32 RegData;
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RegData = MmioRead32 (Addr);
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RegData &= ~Mask;
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RegData |= Data;
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MmioWrite32 (Addr, RegData);
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}
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STATIC
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VOID
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RegSet (
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IN EFI_PHYSICAL_ADDRESS Addr,
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IN UINT32 Data,
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IN UINT32 Mask
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)
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{
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DEBUG((DEBUG_INFO, "Write to address = %10x, data = %10x (mask = %10x)-\n",
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Addr, Data, Mask));
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DEBUG((DEBUG_INFO, "old value = %10x ==>\n", MmioRead32 (Addr)));
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RegSetSilent (Addr, Data, Mask);
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DEBUG((DEBUG_INFO, "new value %10x\n", MmioRead32 (Addr)));
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}
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STATIC
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VOID
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UtmiPhyPowerDown (
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IN UINT32 UtmiIndex,
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IN EFI_PHYSICAL_ADDRESS UtmiBaseAddr,
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IN EFI_PHYSICAL_ADDRESS UsbCfgAddr,
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IN EFI_PHYSICAL_ADDRESS UtmiCfgAddr,
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IN UINT32 UtmiPhyPort
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)
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{
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UINT32 Mask, Data;
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: UTMI %d - Power down transceiver(power down Phy)\n",
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UtmiIndex));
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: Power down PLL, and SuspendDM\n"));
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/* Power down UTMI PHY */
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RegSet (UtmiCfgAddr, 0x0 << UTMI_PHY_CFG_PU_OFFSET, UTMI_PHY_CFG_PU_MASK);
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/* Config USB3 Device UTMI enable */
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Mask = UTMI_USB_CFG_DEVICE_EN_MASK;
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/*
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* Prior to PHY init, configure mux for Device
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* (Device can be connected to UTMI0 or to UTMI1)
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*/
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if (UtmiPhyPort == UTMI_PHY_TO_USB_DEVICE0) {
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Data = 0x1 << UTMI_USB_CFG_DEVICE_EN_OFFSET;
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/* Config USB3 Device UTMI MUX */
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Mask |= UTMI_USB_CFG_DEVICE_MUX_MASK;
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Data |= UtmiIndex << UTMI_USB_CFG_DEVICE_MUX_OFFSET;
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} else {
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Data = 0x0 << UTMI_USB_CFG_DEVICE_EN_OFFSET;
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}
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RegSet (UsbCfgAddr, Data, Mask);
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/* Set Test suspendm mode */
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Mask = UTMI_CTRL_STATUS0_SUSPENDM_MASK;
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Data = 0x1 << UTMI_CTRL_STATUS0_SUSPENDM_OFFSET;
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/* Enable Test UTMI select */
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Mask |= UTMI_CTRL_STATUS0_TEST_SEL_MASK;
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Data |= 0x1 << UTMI_CTRL_STATUS0_TEST_SEL_OFFSET;
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RegSet (UtmiBaseAddr + UTMI_CTRL_STATUS0_REG, Data, Mask);
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/* Wait for UTMI power down */
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MicroSecondDelay (1000);
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}
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STATIC
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VOID
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UtmiPhyConfig (
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IN UINT32 UtmiIndex,
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IN EFI_PHYSICAL_ADDRESS UtmiPllAddr,
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IN EFI_PHYSICAL_ADDRESS UtmiBaseAddr,
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IN EFI_PHYSICAL_ADDRESS UsbCfgAddr,
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IN EFI_PHYSICAL_ADDRESS UtmiCfgAddr,
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IN UINT32 UtmiPhyPort
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)
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{
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UINT32 Mask, Data;
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: Configure UTMI PHY %d registers\n",
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UtmiIndex));
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/* Reference Clock Divider Select */
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Mask = UTMI_PLL_CTRL_REFDIV_MASK;
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Data = 0x5 << UTMI_PLL_CTRL_REFDIV_OFFSET;
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/* Feedback Clock Divider Select - 90 for 25Mhz */
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Mask |= UTMI_PLL_CTRL_FBDIV_MASK;
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Data |= 0x60 << UTMI_PLL_CTRL_FBDIV_OFFSET;
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/* Select LPFR - 0x0 for 25Mhz/5=5Mhz */
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Mask |= UTMI_PLL_CTRL_SEL_LPFR_MASK;
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Data |= 0x0 << UTMI_PLL_CTRL_SEL_LPFR_OFFSET;
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RegSet (UtmiPllAddr + UTMI_PLL_CTRL_REG, Data, Mask);
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/* Impedance Calibration Threshold Setting */
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RegSet (UtmiPllAddr + UTMI_CALIB_CTRL_REG,
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0x7 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET,
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UTMI_CALIB_CTRL_IMPCAL_VTH_MASK);
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/* Start Impedance and PLL Calibration */
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Mask = UTMI_CALIB_CTRL_PLLCAL_START_MASK;
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Data = (0x1 << UTMI_CALIB_CTRL_PLLCAL_START_OFFSET);
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Mask |= UTMI_CALIB_CTRL_IMPCAL_START_MASK;
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Data |= (0x1 << UTMI_CALIB_CTRL_IMPCAL_START_OFFSET);
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RegSet (UtmiPllAddr + UTMI_CALIB_CTRL_REG, Data, Mask);
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/* Set LS TX driver strength coarse control */
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Mask = UTMI_TX_CH_CTRL_DRV_EN_LS_MASK;
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Data = 0x3 << UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET;
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Mask |= UTMI_TX_CH_CTRL_AMP_MASK;
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Data |= 0x4 << UTMI_TX_CH_CTRL_AMP_OFFSET;
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Mask |= UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK;
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Data |= 0x3 << UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET;
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RegSet (UtmiBaseAddr + UTMI_TX_CH_CTRL_REG, Data, Mask);
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/* Enable SQ */
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Mask = UTMI_RX_CH_CTRL0_SQ_DET_MASK;
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Data = 0x1 << UTMI_RX_CH_CTRL0_SQ_DET_OFFSET;
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/* Enable analog squelch detect */
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Mask |= UTMI_RX_CH_CTRL0_SQ_ANA_DTC_MASK;
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Data |= 0x0 << UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET;
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Mask |= UTMI_RX_CH_CTRL0_DISCON_THRESH_MASK;
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Data |= 0x0 << UTMI_RX_CH_CTRL0_DISCON_THRESH_OFFSET;
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RegSet (UtmiBaseAddr + UTMI_RX_CH_CTRL0_REG, Data, Mask);
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/* Set External squelch calibration number */
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Mask = UTMI_RX_CH_CTRL1_SQ_AMP_CAL_MASK;
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Data = 0x1 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET;
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/* Enable the External squelch calibration */
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Mask |= UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_MASK;
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Data |= 0x1 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET;
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RegSet (UtmiBaseAddr + UTMI_RX_CH_CTRL1_REG, Data, Mask);
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/* Set Control VDAT Reference Voltage - 0.325V */
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Mask = UTMI_CHGDTC_CTRL_VDAT_MASK;
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Data = 0x1 << UTMI_CHGDTC_CTRL_VDAT_OFFSET;
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/* Set Control VSRC Reference Voltage - 0.6V */
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Mask |= UTMI_CHGDTC_CTRL_VSRC_MASK;
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Data |= 0x1 << UTMI_CHGDTC_CTRL_VSRC_OFFSET;
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RegSet (UtmiBaseAddr + UTMI_CHGDTC_CTRL_REG, Data, Mask);
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}
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STATIC
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UINTN
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UtmiPhyPowerUp (
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IN UINT32 UtmiIndex,
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IN EFI_PHYSICAL_ADDRESS UtmiPllAddr,
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IN EFI_PHYSICAL_ADDRESS UtmiBaseAddr,
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IN EFI_PHYSICAL_ADDRESS UsbCfgAddr,
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IN EFI_PHYSICAL_ADDRESS UtmiCfgAddr,
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IN UINT32 UtmiPhyPort
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)
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{
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EFI_STATUS Status;
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UINT32 Data;
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: UTMI %d - Power up transceiver(Power up Phy)\n",
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UtmiIndex));
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: exit SuspendDM\n"));
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/* Power up UTMI PHY */
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RegSet (UtmiCfgAddr, 0x1 << UTMI_PHY_CFG_PU_OFFSET, UTMI_PHY_CFG_PU_MASK);
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/* Disable Test UTMI select */
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RegSet (UtmiBaseAddr + UTMI_CTRL_STATUS0_REG,
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0x0 << UTMI_CTRL_STATUS0_TEST_SEL_OFFSET,
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UTMI_CTRL_STATUS0_TEST_SEL_MASK);
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: Wait for PLL and impedance calibration done, and PLL ready\n"));
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/* Delay 10ms */
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MicroSecondDelay (10000);
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Data = MmioRead32 (UtmiPllAddr + UTMI_CALIB_CTRL_REG);
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if ((Data & UTMI_CALIB_CTRL_IMPCAL_DONE_MASK) == 0) {
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DEBUG((DEBUG_ERROR, "UtmiPhy: Impedance calibration is not done\n"));
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Status = EFI_D_ERROR;
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}
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if ((Data & UTMI_CALIB_CTRL_PLLCAL_DONE_MASK) == 0) {
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DEBUG((DEBUG_ERROR, "UtmiPhy: PLL calibration is not done\n"));
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Status = EFI_D_ERROR;
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}
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Data = MmioRead32 (UtmiPllAddr + UTMI_PLL_CTRL_REG);
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if ((Data & UTMI_PLL_CTRL_PLL_RDY_MASK) == 0) {
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DEBUG((DEBUG_ERROR, "UtmiPhy: PLL is not ready\n"));
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Status = EFI_D_ERROR;
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}
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return Status;
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}
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/*
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* Cp110UtmiPhyInit initializes the UTMI PHY
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* the init split in 3 parts:
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* 1. Power down transceiver and PLL
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* 2. UTMI PHY configure
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* 3. Power up transceiver and PLL
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*/
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STATIC
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VOID
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Cp110UtmiPhyInit (
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IN UTMI_PHY_DATA *UtmiData
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)
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{
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EFI_STATUS Status;
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UtmiPhyPowerDown (UtmiData->PhyId,
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UtmiData->UtmiBaseAddr,
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UtmiData->UsbCfgAddr,
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UtmiData->UtmiCfgAddr,
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UtmiData->UtmiPhyPort);
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/* Power down PLL */
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: PHY power down PLL\n"));
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MmioAnd32 (UtmiData->UsbCfgAddr, ~UTMI_USB_CFG_PLL_MASK);
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UtmiPhyConfig (UtmiData->PhyId,
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UtmiData->UtmiPllAddr,
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UtmiData->UtmiBaseAddr,
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UtmiData->UsbCfgAddr,
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UtmiData->UtmiCfgAddr,
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UtmiData->UtmiPhyPort);
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Status = UtmiPhyPowerUp (UtmiData->PhyId,
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UtmiData->UtmiPllAddr,
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UtmiData->UtmiBaseAddr,
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UtmiData->UsbCfgAddr,
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UtmiData->UtmiCfgAddr,
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UtmiData->UtmiPhyPort);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "UtmiPhy: Failed to initialize UTMI PHY %d\n", UtmiData->PhyId));
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return;
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}
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DEBUG ((DEBUG_ERROR, "UTMI PHY %d initialized to ", UtmiData->PhyId));
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if (UtmiData->UtmiPhyPort == UTMI_PHY_TO_USB_DEVICE0) {
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DEBUG ((DEBUG_ERROR, "USB Device\n"));
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} else {
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DEBUG ((DEBUG_ERROR, "USB Host%d\n", UtmiData->UtmiPhyPort));
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}
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/* Power up PLL */
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DEBUG((DEBUG_INFO, "UtmiPhy: stage: PHY power up PLL\n"));
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MmioOr32 (UtmiData->UsbCfgAddr, UTMI_USB_CFG_PLL_MASK);
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}
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EFI_STATUS
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UtmiPhyInit (
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VOID
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)
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{
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MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
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MV_BOARD_UTMI_DESC *BoardDesc;
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UTMI_PHY_DATA UtmiData;
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EFI_STATUS Status;
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UINTN Index;
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/* Obtain board description */
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Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
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NULL,
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(VOID **)&BoardDescProtocol);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = BoardDescProtocol->BoardDescUtmiGet (BoardDescProtocol, &BoardDesc);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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/* Initialize enabled chips */
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for (Index = 0; Index < BoardDesc->UtmiDevCount; Index++) {
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/* Get base address of UTMI phy */
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UtmiData.UtmiBaseAddr = BoardDesc[Index].SoC->UtmiBaseAddress;
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/* Get base address of PLL registers */
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UtmiData.UtmiPllAddr = BoardDesc[Index].SoC->UtmiPllAddress;
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/* Get usb config address */
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UtmiData.UsbCfgAddr = BoardDesc[Index].SoC->UsbConfigAddress;
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/* Get UTMI config address */
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UtmiData.UtmiCfgAddr = BoardDesc[Index].SoC->UtmiConfigAddress;
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/* Get UTMI PHY ID */
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UtmiData.PhyId = BoardDesc[Index].SoC->UtmiPhyId;
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/* Get the usb port type */
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UtmiData.UtmiPhyPort = BoardDesc[Index].UtmiPortType;
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/* Currently only Cp110 is supported */
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Cp110UtmiPhyInit (&UtmiData);
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}
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BoardDescProtocol->BoardDescFree (BoardDesc);
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return EFI_SUCCESS;
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}
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