/********************************************************************************
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Copyright (C) 2016 Marvell International Ltd.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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*******************************************************************************/
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#include <Protocol/BoardDesc.h>
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#include <Protocol/DriverBinding.h>
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#include <Protocol/Mdio.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PcdLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiLib.h>
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#include "MvMdioDxe.h"
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STATIC
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EFI_STATUS
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MdioCheckParam (
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INTN PhyAddr,
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INTN RegOff
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)
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{
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if (PhyAddr > MVEBU_PHY_ADDR_MASK) {
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DEBUG((DEBUG_ERROR, "Invalid PHY address %d\n", PhyAddr));
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return EFI_INVALID_PARAMETER;
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}
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if (RegOff > MVEBU_PHY_REG_MASK) {
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DEBUG((DEBUG_ERROR, "Invalid register offset %d\n", RegOff));
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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STATIC
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EFI_STATUS
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MdioWaitReady (
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UINTN MdioBase
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)
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{
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UINT32 Timeout = MVEBU_SMI_TIMEOUT;
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UINT32 MdioReg;
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/* wait till the SMI is not busy */
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do {
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/* read smi register */
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MdioReg = MmioRead32(MdioBase);
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if (Timeout-- == 0) {
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DEBUG((DEBUG_ERROR, "SMI busy Timeout\n"));
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return EFI_TIMEOUT;
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}
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} while (MdioReg & MVEBU_SMI_BUSY);
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return EFI_SUCCESS;
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}
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STATIC
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EFI_STATUS
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MdioWaitValid (
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UINTN MdioBase
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)
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{
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UINT32 Timeout = MVEBU_SMI_TIMEOUT;
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UINT32 MdioReg;
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/* wait till read value is ready */
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do {
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/* read smi register */
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MdioReg = MmioRead32 (MdioBase);
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if (Timeout-- == 0) {
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DEBUG((DEBUG_ERROR, "SMI read ready time-out\n"));
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return EFI_TIMEOUT;
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}
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} while (!(MdioReg & MVEBU_SMI_READ_VALID));
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return EFI_SUCCESS;
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}
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STATIC
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EFI_STATUS
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MdioOperation (
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IN CONST MARVELL_MDIO_PROTOCOL *This,
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IN UINT32 PhyAddr,
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IN UINT32 MdioIndex,
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IN UINT32 RegOff,
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IN BOOLEAN Write,
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IN OUT UINT32 *Data
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)
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{
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UINTN MdioBase = This->BaseAddresses[MdioIndex];
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UINT32 MdioReg;
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EFI_STATUS Status;
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Status = MdioCheckParam (PhyAddr, RegOff);
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if (EFI_ERROR(Status)) {
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DEBUG((DEBUG_ERROR, "MdioDxe: wrong parameters\n"));
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return Status;
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}
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/* wait till the SMI is not busy */
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Status = MdioWaitReady (MdioBase);
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if (EFI_ERROR(Status)) {
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DEBUG((DEBUG_ERROR, "MdioDxe: MdioWaitReady error\n"));
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return Status;
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}
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/* fill the phy addr and reg offset and write opcode and data */
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MdioReg = (PhyAddr << MVEBU_SMI_DEV_ADDR_OFFS)
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| (RegOff << MVEBU_SMI_REG_ADDR_OFFS);
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if (Write) {
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MdioReg &= ~MVEBU_SMI_OPCODE_READ;
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MdioReg |= (*Data << MVEBU_SMI_DATA_OFFS);
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} else {
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MdioReg |= MVEBU_SMI_OPCODE_READ;
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}
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/* write the smi register */
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MdioRegWrite32 (MdioReg, MdioBase);
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/* make sure that the write transaction is over */
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Status = Write ? MdioWaitReady (MdioBase) : MdioWaitValid (MdioBase);
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if (EFI_ERROR(Status)) {
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DEBUG((DEBUG_ERROR, "MdioDxe: MdioWaitReady error\n"));
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return Status;
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}
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if (!Write) {
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*Data = MmioRead32 (MdioBase) & MVEBU_SMI_DATA_MASK;
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}
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return EFI_SUCCESS;
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}
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STATIC
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EFI_STATUS
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MvMdioRead (
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IN CONST MARVELL_MDIO_PROTOCOL *This,
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IN UINT32 PhyAddr,
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IN UINT32 MdioIndex,
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IN UINT32 RegOff,
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IN UINT32 *Data
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)
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{
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EFI_STATUS Status;
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Status = MdioOperation (
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This,
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PhyAddr,
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MdioIndex,
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RegOff,
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FALSE,
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Data
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);
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return Status;
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}
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EFI_STATUS
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MvMdioWrite (
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IN CONST MARVELL_MDIO_PROTOCOL *This,
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IN UINT32 PhyAddr,
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IN UINT32 MdioIndex,
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IN UINT32 RegOff,
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IN UINT32 Data
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)
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{
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return MdioOperation (
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This,
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PhyAddr,
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MdioIndex,
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RegOff,
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TRUE,
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&Data
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);
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}
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EFI_STATUS
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EFIAPI
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MvMdioDxeInitialise (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
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MV_BOARD_MDIO_DESC *MdioBoardDesc;
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UINT8 Index;
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MARVELL_MDIO_PROTOCOL *Mdio;
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EFI_STATUS Status;
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EFI_HANDLE Handle = NULL;
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/* Obtain list of available controllers */
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Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
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NULL,
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(VOID **)&BoardDescProtocol);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = BoardDescProtocol->BoardDescMdioGet (BoardDescProtocol,
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&MdioBoardDesc);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Mdio = AllocateZeroPool (sizeof (MARVELL_MDIO_PROTOCOL));
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if (Mdio == NULL) {
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DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
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return EFI_OUT_OF_RESOURCES;
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}
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Mdio->BaseAddresses = AllocateZeroPool (MdioBoardDesc->MdioDevCount *
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sizeof (UINTN));
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if (Mdio->BaseAddresses == NULL) {
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DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
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return EFI_OUT_OF_RESOURCES;
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}
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/* Obtain base addresses of all possible controllers */
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for (Index = 0; Index < MdioBoardDesc->MdioDevCount; Index++) {
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Mdio->BaseAddresses[Index] = MdioBoardDesc[Index].SoC->MdioBaseAddress;
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}
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Mdio->ControllerCount = MdioBoardDesc->MdioDevCount;
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Mdio->Read = MvMdioRead;
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Mdio->Write = MvMdioWrite;
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Status = gBS->InstallMultipleProtocolInterfaces (
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&Handle,
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&gMarvellMdioProtocolGuid, Mdio,
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NULL
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);
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if (EFI_ERROR(Status)) {
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DEBUG((DEBUG_ERROR, "Failed to install interfaces\n"));
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return Status;
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}
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BoardDescProtocol->BoardDescFree (MdioBoardDesc);
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return EFI_SUCCESS;
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}
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