/** @file
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*
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* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
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* Copyright (c) 2015, Linaro Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <PiDxe.h>
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#include <Library/ArmLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/I2CLib.h>
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#include <Library/TimerLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/PlatformSysCtrlLib.h>
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#include "I2CLibInternal.h"
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#include "I2CHw.h"
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#define I2C_100KB_SPEED 0x1
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#define I2C_400KB_SPEED 0x2
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VOID
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I2C_Delay (
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UINT32 Count
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)
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{
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MicroSecondDelay (Count);
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return;
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}
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EFI_STATUS
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EFIAPI
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I2C_Disable (
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UINT32 Socket,
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UINT8 Port
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)
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{
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UINT32 TimeCnt = I2C_READ_TIMEOUT;
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I2C0_STATUS_U I2cStatusReg;
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I2C0_ENABLE_U I2cEnableReg;
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I2C0_ENABLE_STATUS_U I2cEnableStatusReg;
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UINTN Base = GetI2cBase (Socket, Port);
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I2C_REG_READ ((Base + I2C_STATUS_OFFSET), I2cStatusReg.Val32);
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while (I2cStatusReg.bits.activity) {
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I2C_Delay (10000);
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TimeCnt--;
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I2C_REG_READ (Base + I2C_STATUS_OFFSET, I2cStatusReg.Val32);
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if (TimeCnt == 0) {
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return EFI_DEVICE_ERROR;
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}
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}
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I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
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I2cEnableReg.bits.enable = 0;
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I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
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I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableStatusReg.Val32);
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if (I2cEnableStatusReg.bits.ic_en == 0) {
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return EFI_SUCCESS;
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} else {
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return EFI_DEVICE_ERROR;
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}
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}
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EFI_STATUS
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EFIAPI
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I2C_Enable (
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UINT32 Socket,
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UINT8 Port
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)
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{
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I2C0_ENABLE_U I2cEnableReg;
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I2C0_ENABLE_STATUS_U I2cEnableStatusReg;
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UINT32 TimeCnt = I2C_READ_TIMEOUT;
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UINTN Base = GetI2cBase (Socket, Port);
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I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
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I2cEnableReg.bits.enable = 1;
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I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
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do {
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// This is a empirical value for I2C delay. MemoryFence is no need here.
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I2C_Delay (10000);
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TimeCnt--;
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I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
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if (TimeCnt == 0) {
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return EFI_DEVICE_ERROR;
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}
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} while (I2cEnableStatusReg.bits.ic_en == 0);
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return EFI_SUCCESS;
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}
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VOID
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I2C_SetTarget (
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UINT32 Socket,
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UINT8 Port,
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UINT32 I2cDeviceAddr
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)
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{
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I2C0_TAR_U I2cTargetReg;
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UINTN Base = GetI2cBase (Socket, Port);
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I2C_REG_READ (Base + I2C_TAR_OFFSET, I2cTargetReg.Val32);
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I2cTargetReg.bits.ic_tar = I2cDeviceAddr;
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I2C_REG_WRITE (Base + I2C_TAR_OFFSET, I2cTargetReg.Val32);
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return;
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}
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EFI_STATUS
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EFIAPI
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I2CInit (
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UINT32 Socket,
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UINT32 Port,
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SPEED_MODE SpeedMode
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)
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{
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I2C0_CON_U I2cControlReg;
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I2C0_SS_SCL_HCNT_U I2cStandardSpeedSclHighCount;
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I2C0_SS_SCL_LCNT_U I2cStandardSpeedSclLowCount;
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I2C0_RX_TL_U I2cRxFifoReg;
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I2C0_TX_TL_U I2cTxFifoReg;
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I2C0_INTR_MASK_U I2cIntrMask;
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EFI_STATUS Status;
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UINTN Base = GetI2cBase (Socket, Port);
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if ((Socket >= MAX_SOCKET) ||
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(Port >= I2C_PORT_MAX) ||
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(SpeedMode >= SPEED_MODE_MAX)) {
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return EFI_INVALID_PARAMETER;
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}
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Status = I2C_Disable (Socket,Port);
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if (EFI_ERROR (Status)) {
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return EFI_DEVICE_ERROR;
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}
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I2C_REG_READ (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
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I2cControlReg.bits.master = 1;
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if(SpeedMode == Normal) {
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I2cControlReg.bits.Speed = I2C_100KB_SPEED;
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} else {
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I2cControlReg.bits.Speed = I2C_400KB_SPEED;
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}
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I2cControlReg.bits.restart_en = 1;
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I2cControlReg.bits.slave_disable = 1;
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I2C_REG_WRITE (Base + I2C_CON_OFFSET, I2cControlReg.Val32);
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if (SpeedMode == Normal) {
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I2C_REG_READ (Base + I2C_SS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighCount.Val32);
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I2cStandardSpeedSclHighCount.bits.ic_ss_scl_hcnt = I2C_SS_SCLHCNT;
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I2C_REG_WRITE (Base + I2C_SS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighCount.Val32);
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I2C_REG_READ (Base + I2C_SS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCount.Val32);
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I2cStandardSpeedSclLowCount.bits.ic_ss_scl_lcnt = I2C_SS_SCLLCNT;
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I2C_REG_WRITE (Base + I2C_SS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCount.Val32);
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} else {
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I2C_REG_READ (Base + I2C_FS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighCount.Val32);
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I2cStandardSpeedSclHighCount.bits.ic_ss_scl_hcnt = I2C_SS_SCLHCNT;
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I2C_REG_WRITE (Base + I2C_FS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighCount.Val32);
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I2C_REG_READ (Base + I2C_FS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCount.Val32);
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I2cStandardSpeedSclLowCount.bits.ic_ss_scl_lcnt = I2C_SS_SCLLCNT;
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I2C_REG_WRITE (Base + I2C_FS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCount.Val32);
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}
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I2C_REG_READ (Base + I2C_RX_TL_OFFSET, I2cRxFifoReg.Val32);
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I2cRxFifoReg.bits.rx_tl = I2C_TXRX_THRESHOLD;
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I2C_REG_WRITE (Base + I2C_RX_TL_OFFSET, I2cRxFifoReg.Val32);
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I2C_REG_READ (Base + I2C_TX_TL_OFFSET, I2cTxFifoReg.Val32);
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I2cTxFifoReg.bits.tx_tl = I2C_TXRX_THRESHOLD;
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I2C_REG_WRITE (Base + I2C_TX_TL_OFFSET, I2cTxFifoReg.Val32);
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I2C_REG_READ (Base + I2C_INTR_MASK_OFFSET, I2cIntrMask.Val32);
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I2cIntrMask.Val32 = 0x0;
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I2C_REG_WRITE (Base + I2C_INTR_MASK_OFFSET, I2cIntrMask.Val32);
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Status = I2C_Enable (Socket, Port);
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if (EFI_ERROR (Status)) {
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return EFI_DEVICE_ERROR;
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}
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return I2cLibRuntimeSetup (Socket, Port);
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}
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EFI_STATUS
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EFIAPI
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I2CSdaConfig (
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UINT32 Socket,
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UINT32 Port
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)
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{
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UINTN Base = GetI2cBase (Socket, Port);
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if ((Socket >= MAX_SOCKET) || (Port >= I2C_PORT_MAX)) {
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return EFI_INVALID_PARAMETER;
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}
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I2C_REG_WRITE (Base + I2C_SDA_HOLD, 0x14);
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return EFI_SUCCESS;
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}
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UINT32
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I2C_GetTxStatus (
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UINT32 Socket,
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UINT8 Port
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)
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{
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I2C0_TXFLR_U Fifo;
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UINTN Base = GetI2cBase (Socket, Port);
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I2C_REG_READ (Base + I2C_TXFLR_OFFSET, Fifo.Val32);
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return Fifo.bits.txflr;
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}
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UINT32
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I2C_GetRxStatus (
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UINT32 Socket,
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UINT8 Port
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)
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{
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I2C0_RXFLR_U Fifo;
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UINTN Base = GetI2cBase (Socket, Port);
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I2C_REG_READ (Base + I2C_RXFLR_OFFSET, Fifo.Val32);
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return Fifo.bits.rxflr;
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}
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EFI_STATUS
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EFIAPI
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CheckI2CTimeOut (
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UINT32 Socket,
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UINT8 Port,
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I2CTransfer Transfer
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)
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{
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UINT32 Times = 0;
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UINT32 Fifo;
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if (Transfer == I2CTx) {
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Fifo = I2C_GetTxStatus (Socket, Port);
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while (Fifo != 0) {
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if (Port == I2C_EXTENDER_PORT_HNS) {
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// This is a empirical value for I2C delay. MemoryFence is no need here.
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I2C_Delay (1000);
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} else {
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// This is a empirical value for I2C delay. MemoryFence is no need here.
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I2C_Delay (2);
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}
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if (++Times > I2C_READ_TIMEOUT) {
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(VOID)I2C_Disable (Socket, Port);
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return EFI_TIMEOUT;
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}
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Fifo = I2C_GetTxStatus (Socket, Port);
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}
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} else {
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Fifo = I2C_GetRxStatus (Socket, Port);
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while (Fifo == 0) {
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if (Port == I2C_EXTENDER_PORT_HNS) {
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// This is a empirical value for I2C delay. MemoryFence is no need here.
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I2C_Delay (1000);
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} else {
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// This is a empirical value for I2C delay. MemoryFence is no need here.
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I2C_Delay (2);
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}
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if (++Times > I2C_READ_TIMEOUT) {
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(VOID)I2C_Disable (Socket, Port);
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return EFI_TIMEOUT;
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}
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Fifo = I2C_GetRxStatus (Socket, Port);
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}
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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WriteBeforeRead (
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I2C_DEVICE *I2cInfo,
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UINT32 Length,
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UINT8 *pBuf
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)
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{
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UINT32 Fifo;
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UINT32 Count;
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UINT32 Times = 0;
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UINTN Base = GetI2cBase (I2cInfo->Socket, I2cInfo->Port);
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I2C_SetTarget (I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddress);
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if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
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return EFI_TIMEOUT;
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}
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Fifo = 0;
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for (Count = 0; Count < Length; Count++) {
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Times = 0;
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while (Fifo > I2C_TXRX_THRESHOLD) {
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I2C_Delay (2);
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if (++Times > I2C_READ_TIMEOUT) {
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return EFI_TIMEOUT;
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}
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Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
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}
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I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, *pBuf++);
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Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
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}
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if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
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return EFI_TIMEOUT;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
|
EFIAPI
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I2CWrite(
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I2C_DEVICE *I2cInfo,
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UINT16 InfoOffset,
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UINT32 Length,
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UINT8 *pBuf
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)
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{
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UINT32 Fifo;
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UINT32 Times = 0;
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UINT32 Idx;
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UINTN Base;
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if (I2cInfo->Port >= I2C_PORT_MAX) {
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return EFI_INVALID_PARAMETER;
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}
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Base = GetI2cBase (I2cInfo->Socket, I2cInfo->Port);
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(VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port);
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I2C_SetTarget(I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddress);
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if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
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return EFI_TIMEOUT;
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}
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if (I2cInfo->DeviceType) {
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I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff);
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I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff);
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} else {
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I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff);
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}
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if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
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return EFI_TIMEOUT;
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}
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for (Idx = 0; Idx < Length; Idx++) {
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Times = 0;
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Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
|
while (Fifo > I2C_TXRX_THRESHOLD) {
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// This is a empirical value for I2C delay. MemoryFence is no need here.
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I2C_Delay (1000);
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if (++Times > I2C_READ_TIMEOUT) {
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(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
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return EFI_TIMEOUT;
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}
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Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port);
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}
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if (Idx < Length - 1) {
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I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (*pBuf++));
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} else {
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//Send command stop bit for the last transfer
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I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (*pBuf++) | I2C_CMD_STOP_BIT);
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}
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}
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if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
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return EFI_TIMEOUT;
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}
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(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
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|
return EFI_SUCCESS;
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}
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EFI_STATUS
|
EFIAPI
|
I2CRead(
|
I2C_DEVICE *I2cInfo,
|
UINT16 InfoOffset,
|
UINT32 RxLen,
|
UINT8 *pBuf
|
)
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{
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UINT8 I2CWAddr[2];
|
EFI_STATUS Status;
|
UINT32 Idx = 0;
|
UINTN Base;
|
|
if (I2cInfo->Port >= I2C_PORT_MAX) {
|
return EFI_INVALID_PARAMETER;
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}
|
|
(VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port);
|
Base = GetI2cBase (I2cInfo->Socket, I2cInfo->Port);
|
if (I2cInfo->DeviceType) {
|
I2CWAddr[0] = (InfoOffset >> 8) & 0xff;
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I2CWAddr[1] = (InfoOffset & 0xff);
|
Status = WriteBeforeRead (I2cInfo, 2,I2CWAddr);
|
if (EFI_ERROR (Status)) {
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(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
return EFI_ABORTED;
|
}
|
} else {
|
I2CWAddr[0] = (InfoOffset & 0xff);
|
Status = WriteBeforeRead (I2cInfo, 1, I2CWAddr);
|
if (EFI_ERROR (Status)) {
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
return EFI_ABORTED;
|
}
|
}
|
|
I2C_SetTarget (I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddress);
|
|
if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
|
return EFI_TIMEOUT;
|
}
|
|
while (RxLen > 0) {
|
if (RxLen > 1) {
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL);
|
} else {
|
//Send command stop bit for the last transfer
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL | I2C_CMD_STOP_BIT);
|
}
|
|
if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CRx) == EFI_TIMEOUT) {
|
return EFI_TIMEOUT;
|
}
|
|
I2C_REG_READ (Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]);
|
|
RxLen --;
|
}
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
|
return EFI_SUCCESS;
|
}
|
|
EFI_STATUS
|
EFIAPI
|
I2CReadMultiByte (
|
I2C_DEVICE *I2cInfo,
|
UINT32 InfoOffset,
|
UINT32 RxLen,
|
UINT8 *pBuf
|
)
|
{
|
UINT32 Count;
|
UINT16 TotalLen = 0;
|
UINT8 I2CWAddr[4];
|
EFI_STATUS Status;
|
UINT32 BytesLeft;
|
UINT32 Idx = 0;
|
UINTN Base;
|
|
if (I2cInfo->Port >= I2C_PORT_MAX) {
|
return EFI_INVALID_PARAMETER;
|
}
|
|
(VOID)I2C_Enable (I2cInfo->Socket, I2cInfo->Port);
|
Base = GetI2cBase (I2cInfo->Socket, I2cInfo->Port);
|
if (I2cInfo->DeviceType == DEVICE_TYPE_E2PROM) {
|
I2CWAddr[0] = (InfoOffset >> 8) & 0xff;
|
I2CWAddr[1] = (InfoOffset & 0xff);
|
Status = WriteBeforeRead (I2cInfo, 2,I2CWAddr);
|
if (EFI_ERROR (Status)) {
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
return EFI_ABORTED;
|
}
|
} else if (I2cInfo->DeviceType == DEVICE_TYPE_CPLD_3BYTE_OPERANDS) {
|
I2CWAddr[0] = (InfoOffset >> 16) & 0xff;
|
I2CWAddr[1] = (InfoOffset >> 8) & 0xff;
|
I2CWAddr[2] = (InfoOffset & 0xff);
|
Status = WriteBeforeRead (I2cInfo, 3, I2CWAddr);
|
if (EFI_ERROR (Status)) {
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
return EFI_ABORTED;
|
}
|
} else if (I2cInfo->DeviceType == DEVICE_TYPE_CPLD_4BYTE_OPERANDS) {
|
I2CWAddr[0] = (InfoOffset >> 24) & 0xff;
|
I2CWAddr[1] = (InfoOffset >> 16) & 0xff;
|
I2CWAddr[2] = (InfoOffset >> 8) & 0xff;
|
I2CWAddr[3] = (InfoOffset & 0xff);
|
Status = WriteBeforeRead (I2cInfo, 4,I2CWAddr);
|
if (EFI_ERROR (Status)) {
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
return EFI_ABORTED;
|
}
|
} else {
|
I2CWAddr[0] = (InfoOffset & 0xff);
|
Status = WriteBeforeRead (I2cInfo, 1,I2CWAddr);
|
if (EFI_ERROR (Status)) {
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
return EFI_ABORTED;
|
}
|
}
|
|
I2C_SetTarget(I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddress);
|
TotalLen = RxLen;
|
BytesLeft = TotalLen;
|
|
for (Count = 0; Count < BytesLeft; Count++) {
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL);
|
}
|
|
for (Count = 0; Count < BytesLeft; Count++) {
|
if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CRx) == EFI_TIMEOUT) {
|
return EFI_TIMEOUT;
|
}
|
|
I2C_REG_READ (Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]);
|
}
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
|
return EFI_SUCCESS;
|
}
|
|
EFI_STATUS
|
EFIAPI
|
I2CWriteMultiByte(
|
I2C_DEVICE *I2cInfo,
|
UINT32 InfoOffset,
|
UINT32 Length,
|
UINT8 *pBuf
|
)
|
{
|
UINT32 Idx;
|
UINTN Base;
|
|
if (I2cInfo->Port >= I2C_PORT_MAX) {
|
return EFI_INVALID_PARAMETER;
|
}
|
|
Base = GetI2cBase (I2cInfo->Socket, I2cInfo->Port);
|
|
(VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port);
|
|
I2C_SetTarget(I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddress);
|
|
if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
|
return EFI_TIMEOUT;
|
}
|
|
if (I2cInfo->DeviceType == DEVICE_TYPE_CPLD_3BYTE_OPERANDS) {
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 16) & 0xff);
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff);
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff);
|
} else if (I2cInfo->DeviceType == DEVICE_TYPE_CPLD_4BYTE_OPERANDS) {
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 24) & 0xff);
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 16) & 0xff);
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff);
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff);
|
} else {
|
}
|
|
for (Idx = 0; Idx < Length; Idx++) {
|
I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, *pBuf++);
|
}
|
|
if (CheckI2CTimeOut (I2cInfo->Socket, I2cInfo->Port, I2CTx) == EFI_TIMEOUT) {
|
return EFI_TIMEOUT;
|
}
|
(VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port);
|
|
return EFI_SUCCESS;
|
}
|
|
