/** @file
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*
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* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
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* Copyright (c) 2018, Linaro Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#ifndef OEM_APEI_HI1620_H_H
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#define OEM_APEI_HI1620_H_H
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#define GPIO0_BASE 0x94100000
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#define GPIO1_BASE 0x94110000
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#define GPIO_INT_MASK 0x34
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#define GPIO_INT_EN 0x30
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#define GPIO_SWPORT_DDR 0x04
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#define GPIO_INT_TYPE 0x38
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#define GPIO_INT_POLARITY 0x3c
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#define GPIO_LS_SYNC 0x60
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#define GPIO_INT_COMB 0xffc
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#define IOMUX_REG_BASE 0x94190000
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#define IOMG051 0xCC
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#define IOMG052 0xD0
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#define PAD_EX_INT1 0x4
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#define CPLD_GPIO10_INT_OFFSET 0xfc
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#define CPLD_BASE_ADDR 0x80000000
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#define CPLD_MASK 0x01030000
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#define CPLD_VALUE 0x01020000
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#define MAX_GHES 3
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#define GENERIC_HARDWARE_ERROR_BLOCK_SIZE 0x1000
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#define HEST_TABLE_SIZE 0x2000
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#define BOOT_ERROR_REGION_SIZE 0x1000
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#define GPIO_HEST_NOTIFIED_PIN BIT8
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#define ERST_DATASTORE_SIZE 0x2000
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#endif
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