/** @file
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EFI SMM Control2 Protocol as defined in the PI 1.2 specification.
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This protocol is used initiate synchronous SMI activations. This protocol could be published by a
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processor driver to abstract the SMI IPI or a driver which abstracts the ASIC that is supporting the
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APM port. Because of the possibility of performing SMI IPI transactions, the ability to generate this
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event from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.
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The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an
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abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when
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accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of
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these signals.
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Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _SMM_CONTROL2_H_
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#define _SMM_CONTROL2_H_
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#include <Protocol/MmControl.h>
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#define EFI_SMM_CONTROL2_PROTOCOL_GUID EFI_MM_CONTROL_PROTOCOL_GUID
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typedef EFI_MM_CONTROL_PROTOCOL EFI_SMM_CONTROL2_PROTOCOL;
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typedef EFI_MM_PERIOD EFI_SMM_PERIOD;
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typedef EFI_MM_ACTIVATE EFI_SMM_ACTIVATE2;
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typedef EFI_MM_DEACTIVATE EFI_SMM_DEACTIVATE2;
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extern EFI_GUID gEfiSmmControl2ProtocolGuid;
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#endif
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