/** @file
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Copyright (c) 2022 Rockchip Electronics Co. Ltd.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __ROCKCHIP_DISPLAY_H__
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#define __ROCKCHIP_DISPLAY_H__
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#include <Uefi/UefiBaseType.h>
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#define LIST_FOR_EACH_ENTRY(Pos, Head, Member) \
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for (Pos = BASE_CR((Head)->ForwardLink, typeof(*Pos), Member); \
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&Pos->Member != (Head); \
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Pos = BASE_CR(Pos->Member.ForwardLink, typeof(*Pos), Member))
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#define __ROUND_MASK(x, y) ((__typeof__(x))((y)-1))
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#define ROUNDUP(x, y) ((((x)-1) | __ROUND_MASK(x, y))+1)
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#define ROUNDDOWN(x, y) ((x) & ~__ROUND_MASK(x, y))
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#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
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#define INLINE static inline
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#define BIT(x) (1 << x)
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#define EDID_SIZE 128
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typedef enum {
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ROCKCHIP_DISPLAY_FULLSCREEN,
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ROCKCHIP_DISPLAY_CENTER,
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} LOGO_DISPLAY_MODE;
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typedef enum {
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ROCKCHIP_FMT_ARGB8888 = 0,
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ROCKCHIP_FMT_RGB888,
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ROCKCHIP_FMT_RGB565,
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ROCKCHIP_FMT_YUV420SP = 4,
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ROCKCHIP_FMT_YUV422SP,
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ROCKCHIP_FMT_YUV444SP,
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} DATA_FORMAT;
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/*
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* display output interface supported by rockchip lcdc
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*/
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#define ROCKCHIP_OUT_MODE_P888 0
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#define ROCKCHIP_OUT_MODE_BT1120 0
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#define ROCKCHIP_OUT_MODE_P666 1
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#define ROCKCHIP_OUT_MODE_P565 2
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#define ROCKCHIP_OUT_MODE_BT656 5
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#define ROCKCHIP_OUT_MODE_S888 8
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#define ROCKCHIP_OUT_MODE_S888_DUMMY 12
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#define ROCKCHIP_OUT_MODE_YUV420 14
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/* for use special outface */
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#define ROCKCHIP_OUT_MODE_AAAA 15
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#define VOP_OUTPUT_IF_RGB BIT(0)
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#define VOP_OUTPUT_IF_BT1120 BIT(1)
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#define VOP_OUTPUT_IF_BT656 BIT(2)
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#define VOP_OUTPUT_IF_LVDS0 BIT(3)
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#define VOP_OUTPUT_IF_LVDS1 BIT(4)
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#define VOP_OUTPUT_IF_MIPI0 BIT(5)
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#define VOP_OUTPUT_IF_MIPI1 BIT(6)
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#define VOP_OUTPUT_IF_eDP0 BIT(7)
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#define VOP_OUTPUT_IF_eDP1 BIT(8)
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#define VOP_OUTPUT_IF_DP0 BIT(9)
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#define VOP_OUTPUT_IF_DP1 BIT(10)
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#define VOP_OUTPUT_IF_HDMI0 BIT(11)
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#define VOP_OUTPUT_IF_HDMI1 BIT(12)
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typedef struct {
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UINT32 Mode;
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UINT32 Offset;
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UINT32 Width;
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UINT32 Height;
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UINT32 Bpp;
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CHAR8 *Memory;
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BOOLEAN YMirror;
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} LOGO_INFO;
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typedef struct {
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UINT32 Width;
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UINT32 Height;
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} VOP_RECT;
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typedef struct {
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UINT32 LeftMargin;
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UINT32 RightMargin;
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UINT32 TopMargin;
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UINT32 BottomMargin;
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} OVER_SCAN;
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typedef struct {
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/* Proposed mode values */
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UINT32 Clock; /* in kHz */
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UINT32 HDisplay;
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UINT32 HSyncStart;
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UINT32 HSyncEnd;
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UINT32 HTotal;
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UINT32 VDisplay;
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UINT32 VSyncStart;
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UINT32 VSyncEnd;
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UINT32 VTotal;
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UINT32 VRefresh;
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UINT32 VScan;
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UINT32 Flags;
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UINT32 PictureAspectRatio;
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UINT32 HSkew;
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UINT32 Type;
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/* Actual mode we give to hw */
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UINT32 CrtcClock; /* in KHz */
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UINT32 CrtcHDisplay;
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UINT32 CrtcHBlankStart;
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UINT32 CrtcHBblankEnd;
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UINT32 CrtcHSyncStart;
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UINT32 CrtcHSyncEnd;
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UINT32 CrtcHTotal;
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UINT32 CrtcHSkew;
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UINT32 CrtcVDisplay;
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UINT32 CrtcVBlankStart;
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UINT32 CrtcVBlankEnd;
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UINT32 CrtcVSyncStart;
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UINT32 CrtcVSyncEnd;
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UINT32 CrtcVTotal;
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BOOLEAN Invalid;
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} DRM_DISPLAY_MODE;
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typedef struct {
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UINT16 Brightness;
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UINT16 Contrast;
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UINT16 Saturation;
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UINT16 Hue;
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} BASE_BCSH_INFO;
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typedef struct {
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INT8 DispHeadFlag[6];
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/* struct base2_screen_info screen_info[4]; --- todo */
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BASE_BCSH_INFO BCSHInfo;
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/* struct base_overscan overscan_info; --- todo */
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/* struct base2_gamma_lut_data gamma_lut_data; --- todo */
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/* struct base2_cubic_lut_data cubic_lut_data; --- todo */
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/* struct framebuffer_info framebuffer_info; --- todo */
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UINT32 Reserved[244];
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UINT32 CRC;
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} BASE2_DISP_INFO;
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typedef struct {
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VOID *Connector;
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OVER_SCAN OverScan;
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DRM_DISPLAY_MODE DisplayMode;
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BASE2_DISP_INFO *DispInfo; /* disp_info from baseparameter 2.0 */
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UINT8 EDID[EDID_SIZE * 4];
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UINT32 BusFormat;
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UINT32 OutputMode;
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UINT32 Type;
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UINT32 OutputInterface;
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UINT32 OutputFlags;
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UINT32 ColorSpace;
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UINT32 BPC;
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/**
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* @hold_mode: enabled when it's:
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* (1) mcu hold mode
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* (2) mipi dsi cmd mode
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* (3) edp psr mode
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*/
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BOOLEAN hold_mode;
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} CONNECTOR_STATE;
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typedef struct {
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VOID *Crtc;
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VOID *Private;
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UINT32 CrtcID;
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UINT32 Format;
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UINT32 YMirror;
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UINT32 RBSwap;
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UINT32 XVirtual;
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UINT32 SrcX;
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UINT32 SrcY;
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UINT32 SrcW;
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UINT32 SrcH;
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UINT32 CrtcX;
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UINT32 CrtcY;
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UINT32 CrtcW;
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UINT32 CrtcH;
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UINT32 Feature;
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UINT32 DMAAddress;
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BOOLEAN YUVOverlay;
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VOP_RECT MaxOutput;
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} CRTC_STATE;
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typedef struct {
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LIST_ENTRY ListHead;
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CRTC_STATE CrtcState;
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CONNECTOR_STATE ConnectorState;
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UINT32 ModeNumber;
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VOID *MemoryBase;
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UINT32 MemorySize;
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BOOLEAN IsInit;
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BOOLEAN IsEnable;
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BOOLEAN IsForceOutput;
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UINT32 ForceOutputFormat;
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} DISPLAY_STATE;
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EFIAPI
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EFI_STATUS
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DisplaySetCrtcInfo (
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OUT DRM_DISPLAY_MODE *Mode,
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IN UINT32 AdjustFlags
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);
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EFIAPI
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EFI_STATUS
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DisplaySetFramebuffer (
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OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
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OUT UINTN* VramSize
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);
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#endif
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