/********************************************************************************
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Copyright (C) 2017 Marvell International Ltd.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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*******************************************************************************/
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#ifndef __RTCLIB_H__
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#define __RTCLIB_H__
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/* Armada 70x0 SoC registers */
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#define RTC_STATUS_REG 0x0
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#define RTC_TIME_REG 0xC
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#define RTC_IRQ_2_CONFIG_REG 0x8
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#define RTC_IRQ_ALARM_EN 0x1
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#define RTC_ALARM_2_REG 0x14
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#define RTC_BRIDGE_TIMING_CTRL0_REG_OFFS 0x80
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#define RTC_BRIDGE_TIMING_CTRL1_REG_OFFS 0x84
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#define RTC_IRQ_STATUS_REG 0x90
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#define RTC_IRQ_ALARM_MASK 0x2
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#define RTC_WRITE_PERIOD_DELAY_MASK 0xFFFF
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#define RTC_WRITE_PERIOD_DELAY_DEFAULT 0x3FF
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#define RTC_WRITE_SETUP_DELAY_MASK (0xFFFF << 16)
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#define RTC_WRITE_SETUP_DELAY_DEFAULT (0x29 << 16)
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#define RTC_READ_OUTPUT_DELAY_MASK 0xFFFF
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#define RTC_READ_OUTPUT_DELAY_DEFAULT 0x3F
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#endif /* __RTCLIB_H__ */
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