/** @file
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Pch SATA library.
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All function in this library is available for PEI, DXE, and SMM,
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But do not support UEFI RUNTIME environment call.
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Uefi/UefiBaseType.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/PchInfoLib.h>
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#include <Library/SataLib.h>
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#include <Register/PchRegs.h>
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#include <Register/SataRegs.h>
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#include <Library/PchPciBdfLib.h>
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/**
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Get SATA controller address that can be passed to the PCI Segment Library functions.
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@param[in] SataCtrlIndex SATA controller index
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@retval SATA controller address in PCI Segment Library representation
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**/
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UINT64
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SataRegBase (
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IN UINT32 SataCtrlIndex
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)
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{
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ASSERT (SataCtrlIndex < MaxSataControllerNum ());
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return SataPciCfgBase (SataCtrlIndex);
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}
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/**
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Get SATA controller's Port Present Status
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@param[in] SataCtrlIndex SATA controller index
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@retval Port Present Status
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**/
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UINT8
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GetSataPortPresentStatus (
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IN UINT32 SataCtrlIndex
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)
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{
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ASSERT (SataCtrlIndex < MaxSataControllerNum ());
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return PciSegmentRead8 (SataPciCfgBase (SataCtrlIndex) + R_SATA_CFG_PCS + 2);
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}
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/**
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Get SATA controller Function Disable Status
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@param[in] SataCtrlIndex SATA controller index
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@retval 0 SATA Controller is not Function Disabled
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@retval 1 SATA Controller is Function Disabled
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**/
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BOOLEAN
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SataControllerFunctionDisableStatus (
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IN UINT32 SataCtrlIndex
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)
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{
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UINT32 SataGc;
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ASSERT (SataCtrlIndex < MaxSataControllerNum ());
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SataGc = PciSegmentRead32 (SataPciCfgBase (SataCtrlIndex) + R_SATA_CFG_SATAGC);
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return !!(SataGc & BIT10);
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}
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/**
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Get SATA controller ABAR size
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@param[in] SataCtrlIndex SATA controller index
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@retval SATA controller ABAR size
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**/
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UINT32
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GetSataAbarSize (
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IN UINT32 SataCtrlIndex
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)
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{
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UINT32 SataGc;
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ASSERT (SataCtrlIndex < MaxSataControllerNum ());
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SataGc = PciSegmentRead32 (SataPciCfgBase (SataCtrlIndex) + R_SATA_CFG_SATAGC);
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switch (SataGc & B_SATA_CFG_SATAGC_ASSEL) {
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case V_SATA_CFG_SATAGC_ASSEL_2K:
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return SIZE_2KB;
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break;
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case V_SATA_CFG_SATAGC_ASSEL_16K:
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return SIZE_16KB;
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break;
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case V_SATA_CFG_SATAGC_ASSEL_32K:
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return SIZE_32KB;
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break;
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case V_SATA_CFG_SATAGC_ASSEL_64K:
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return SIZE_64KB;
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break;
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case V_SATA_CFG_SATAGC_ASSEL_128K:
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return SIZE_128KB;
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break;
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case V_SATA_CFG_SATAGC_ASSEL_512K:
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return SIZE_256KB;
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break;
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default:
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return SIZE_2KB;
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break;
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}
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}
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/**
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Get SATA controller AHCI base address
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@param[in] SataCtrlIndex SATA controller index
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@retval SATA controller AHCI base address
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**/
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UINT32
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GetSataAhciBase (
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IN UINT32 SataCtrlIndex
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)
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{
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ASSERT (SataCtrlIndex < MaxSataControllerNum ());
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return PciSegmentRead32 (SataPciCfgBase (SataCtrlIndex) + R_SATA_CFG_AHCI_BAR) & 0xFFFFF800;
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}
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