/** @file
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common library for CPU PCIe INIT PEI/DXE/SMM modules
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Uefi/UefiBaseType.h>
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#include <Library/PcieHelperLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/CpuPcieRpLib.h>
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#include <Register/CpuPcieRegs.h>
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#include <Library/CpuPcieInitCommon.h>
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#include <Library/CpuRegbarAccessLib.h>
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/**
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Print registers value
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@param[in] PrintMmioBase Mmio base address
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@param[in] PrintSize Number of registers
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@param[in] OffsetFromBase Offset from mmio base address
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@retval None
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**/
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VOID
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SaPrintRegisters (
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IN UINTN PrintMmioBase,
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IN UINT32 PrintSize,
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IN UINT32 OffsetFromBase
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)
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{
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UINT32 Offset;
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DEBUG ((DEBUG_VERBOSE, " 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F"));
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for (Offset = 0; Offset < PrintSize; Offset++) {
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if ((Offset % 16) == 0) {
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DEBUG ((DEBUG_VERBOSE, "\n %04X: ", (Offset + OffsetFromBase) & 0xFFF0));
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}
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DEBUG ((DEBUG_VERBOSE, "%02X ", MmioRead8 (PrintMmioBase + Offset)));
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}
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DEBUG ((DEBUG_VERBOSE, "\n"));
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}
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/**
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Print registers value
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@param[in] PrintPciSegmentBase Pci segment base address
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@param[in] PrintSize Number of registers
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@param[in] OffsetFromBase Offset from mmio base address
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@retval None
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**/
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VOID
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SaPrintPciRegisters (
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IN UINT64 PrintPciSegmentBase,
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IN UINT32 PrintSize,
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IN UINT32 OffsetFromBase
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)
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{
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UINT32 Offset;
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DEBUG ((DEBUG_VERBOSE, " 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F"));
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for (Offset = 0; Offset < PrintSize; Offset++) {
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if ((Offset % 16) == 0) {
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DEBUG ((DEBUG_VERBOSE, "\n %04X: ", (Offset + OffsetFromBase) & 0xFFF0));
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}
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DEBUG ((DEBUG_VERBOSE, "%02X ", PciSegmentRead8 (PrintPciSegmentBase + Offset)));
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}
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DEBUG ((DEBUG_VERBOSE, "\n"));
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}
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//
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// 2LM: PegPcie APIs using the Sideband Access Mechanism
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//
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/**
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Reads an 8-bit PCI configuration register.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentRead8 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 8-bit PCI configuration register specified by Address.
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**/
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UINT8
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EFIAPI
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PegPciSegmentRead8 (
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IN UINT64 Address
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)
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{
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return PciSegmentRead8 (Address);
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}
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/**
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Writes an 8-bit PCI configuration register.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentWrite8 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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**/
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UINT8
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EFIAPI
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PegPciSegmentWrite8 (
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IN UINT64 Address,
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IN UINT8 Value
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)
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{
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return PciSegmentWrite8 (Address, Value);
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}
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/**
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Reads a 16-bit PCI configuration register.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentRead16 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 16-bit PCI configuration register specified by Address.
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**/
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UINT16
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EFIAPI
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PegPciSegmentRead16 (
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IN UINT64 Address
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)
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{
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return PciSegmentRead16 (Address);
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}
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/**
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Writes a 16-bit PCI configuration register.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentWrite16 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The parameter of Value.
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**/
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UINT16
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EFIAPI
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PegPciSegmentWrite16 (
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IN UINT64 Address,
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IN UINT16 Value
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)
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{
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return PciSegmentWrite16 (Address, Value);
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}
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/**
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Reads a 32-bit PCI configuration register.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentRead32 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 32-bit PCI configuration register specified by Address.
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**/
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UINT32
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EFIAPI
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PegPciSegmentRead32 (
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IN UINT64 Address
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)
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{
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return PciSegmentRead32 (Address);
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}
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/**
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Writes a 32-bit PCI configuration register.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentWrite32 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The parameter of Value.
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**/
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UINT32
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EFIAPI
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PegPciSegmentWrite32 (
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IN UINT64 Address,
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IN UINT32 Value
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)
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{
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return PciSegmentWrite32 (Address, Value);
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}
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/**
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Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentOr16 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT16
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EFIAPI
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PegPciSegmentOr16 (
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IN UINT64 Address,
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IN UINT16 OrData
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)
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{
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return PciSegmentOr16 (Address, OrData);
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}
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/**
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Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentAnd32 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT16
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EFIAPI
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PegPciSegmentAnd16 (
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IN UINT64 Address,
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IN UINT16 AndData
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)
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{
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return PciSegmentAnd16 (Address, AndData);
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}
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/**
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Performs a bitwise AND of a 8-bit PCI configuration register with a 8-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentAnd8 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT8
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EFIAPI
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PegPciSegmentAnd8 (
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IN UINT64 Address,
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IN UINT8 AndData
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)
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{
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return PciSegmentAnd8 (Address, AndData);
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}
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/**
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Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentOr32 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT32
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EFIAPI
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PegPciSegmentOr32 (
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IN UINT64 Address,
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IN UINT32 OrData
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)
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{
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return PciSegmentOr32 (Address, OrData);
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}
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/**
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Performs a bitwise OR of a 8-bit PCI configuration register with a 8-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentOr8 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT8
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EFIAPI
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PegPciSegmentOr8 (
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IN UINT64 Address,
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IN UINT8 OrData
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)
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{
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return PciSegmentOr8 (Address, OrData);
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}
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/**
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Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentAnd32 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT32
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EFIAPI
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PegPciSegmentAnd32 (
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IN UINT64 Address,
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IN UINT32 AndData
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)
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{
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return PciSegmentAnd32 (Address, AndData);
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}
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/**
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Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
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followed a bitwise OR with another 32-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentAndThenOr32 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT32
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EFIAPI
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PegPciSegmentAndThenOr32 (
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IN UINT64 Address,
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IN UINT32 AndData,
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IN UINT32 OrData
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)
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{
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return PciSegmentAndThenOr32 (Address, AndData, OrData);
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}
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/**
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Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
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followed a bitwise OR with another 16-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentAndThenOr16 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT16
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EFIAPI
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PegPciSegmentAndThenOr16 (
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IN UINT64 Address,
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IN UINT16 AndData,
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IN UINT16 OrData
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)
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{
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return PciSegmentAndThenOr16 (Address, AndData, OrData);
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}
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/**
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Performs a bitwise AND of a 8-bit PCI configuration register with a 8-bit value,
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followed a bitwise OR with another 8-bit value.
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Its a wrapper library function. This function uses side band access for PEG60 when 2LM mode is enabled.
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Other calls to this function will be routed to core PciSegmentAndThenOr8 function.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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**/
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UINT8
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EFIAPI
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PegPciSegmentAndThenOr8 (
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IN UINT64 Address,
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IN UINT8 AndData,
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IN UINT8 OrData
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)
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{
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return PciSegmentAndThenOr8 (Address, AndData, OrData);
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}
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/**
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Find the Offset to a Capabilities ID
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@param[in] Segment Pci Segment Number
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@param[in] Bus Pci Bus Number
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@param[in] Device Pci Device Number
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@param[in] Function Pci Function Number
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@param[in] CapId CAPID to search for
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@retval 0 CAPID not found
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@retval Other CAPID found, Offset of desired CAPID
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**/
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UINT8
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PegPcieFindCapId (
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IN UINT8 Segment,
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IN UINT8 Bus,
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IN UINT8 Device,
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IN UINT8 Function,
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IN UINT8 CapId
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)
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{
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return PcieFindCapId (Segment, Bus, Device, Function, CapId);
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}
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/**
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Search and return the offset of desired Pci Express extended Capability ID
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@param[in] Segment Pci Segment Number
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@param[in] Bus Pci Bus Number
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@param[in] Device Pci Device Number
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@param[in] Function Pci Function Number
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@param[in] CapId Extended CAPID to search for
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@retval 0 CAPID not found
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@retval Other CAPID found, Offset of desired CAPID
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**/
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UINT16
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PegPcieFindExtendedCapId (
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IN UINT8 Segment,
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IN UINT8 Bus,
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IN UINT8 Device,
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IN UINT8 Function,
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IN UINT16 CapId
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)
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{
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return PcieFindExtendedCapId (Segment, Bus, Device, Function, CapId);
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}
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