/** @file
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Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "PeiPchPolicyLibrary.h"
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/**
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Print PCH_USB_CONFIG and serial out.
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@param[in] UsbConfig Pointer to a PCH_USB_CONFIG that provides the platform setting
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**/
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VOID
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PchPrintUsbConfig (
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IN CONST PCH_USB_CONFIG *UsbConfig
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)
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{
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UINT32 i;
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DEBUG ((DEBUG_INFO, "------------------ PCH USB Config ------------------\n"));
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DEBUG ((DEBUG_INFO, " UsbPrecondition= %x\n", UsbConfig->UsbPrecondition));
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DEBUG ((DEBUG_INFO, " DisableComplianceMode= %x\n", UsbConfig->DisableComplianceMode));
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for (i = 0; i < GetPchUsbMaxPhysicalPortNum (); i++) {
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DEBUG ((DEBUG_INFO, " PortUsb20[%d].Enabled= %x\n", i, UsbConfig->PortUsb20[i].Enable));
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DEBUG ((DEBUG_INFO, " PortUsb20[%d].OverCurrentPin= OC%x\n", i, UsbConfig->PortUsb20[i].OverCurrentPin));
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DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Petxiset= %x\n", i, UsbConfig->PortUsb20[i].Afe.Petxiset));
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DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Txiset= %x\n", i, UsbConfig->PortUsb20[i].Afe.Txiset));
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DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Predeemp= %x\n", i, UsbConfig->PortUsb20[i].Afe.Predeemp));
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DEBUG ((DEBUG_INFO, " PortUsb20[%d].Afe.Pehalfbit= %x\n", i, UsbConfig->PortUsb20[i].Afe.Pehalfbit));
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}
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for (i = 0; i < GetPchXhciMaxUsb3PortNum (); i++) {
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DEBUG ((DEBUG_INFO, " PortUsb30[%d] Enabled= %x\n", i, UsbConfig->PortUsb30[i].Enable));
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DEBUG ((DEBUG_INFO, " PortUsb30[%d].OverCurrentPin= OC%x\n", i, UsbConfig->PortUsb30[i].OverCurrentPin));
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DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDeEmph = %x\n", i, UsbConfig->PortUsb30[i].HsioTxDeEmph));
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DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDeEmphEnable = %x\n", i, UsbConfig->PortUsb30[i].HsioTxDeEmphEnable));
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DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDownscaleAmp = %x\n", i, UsbConfig->PortUsb30[i].HsioTxDownscaleAmp));
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DEBUG ((DEBUG_INFO, " PortUsb30[%d].HsioTxDownscaleAmpEnable = %x\n", i, UsbConfig->PortUsb30[i].HsioTxDownscaleAmpEnable));
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}
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DEBUG ((DEBUG_INFO, " XdciConfig.Enable= %x\n", UsbConfig->XdciConfig.Enable));
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for (i = 0; i < PCH_XHCI_MAX_SSIC_PORT_COUNT; i++) {
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DEBUG ((DEBUG_INFO, " SsicPort[%d].Enable = %x\n", i, UsbConfig->SsicConfig.SsicPort[i].Enable));
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}
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}
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/**
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Print PCH_PCIE_CONFIG and serial out.
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@param[in] PcieConfig Pointer to a PCH_PCIE_CONFIG that provides the platform setting
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@param[in] HsioPcieConfig Pointer to a PCH_HSIO_PCIE_CONFIG that provides the platform setting
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**/
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VOID
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PchPrintPcieConfig (
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IN CONST PCH_PCIE_CONFIG *PcieConfig,
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IN CONST PCH_HSIO_PCIE_CONFIG *HsioPcieConfig
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)
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{
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UINT32 i;
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DEBUG ((DEBUG_INFO, "------------------ PCH PCIE Config ------------------\n"));
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for (i = 0; i < GetPchMaxPciePortNum (); i++) {
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DEBUG ((DEBUG_INFO, " RootPort[%d] Enabled= %x\n", i, PcieConfig->RootPort[i].Enable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HotPlug= %x\n", i, PcieConfig->RootPort[i].HotPlug));
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DEBUG ((DEBUG_INFO, " RootPort[%d] PmSci= %x\n", i, PcieConfig->RootPort[i].PmSci));
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DEBUG ((DEBUG_INFO, " RootPort[%d] ExtSync= %x\n", i, PcieConfig->RootPort[i].ExtSync));
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DEBUG ((DEBUG_INFO, " RootPort[%d] ClkReqSupported= %x\n", i, PcieConfig->RootPort[i].ClkReqSupported));
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DEBUG ((DEBUG_INFO, " RootPort[%d] ClkReqNumber= %x\n", i, PcieConfig->RootPort[i].ClkReqNumber));
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DEBUG ((DEBUG_INFO, " RootPort[%d] ClkReqDetect= %x\n", i, PcieConfig->RootPort[i].ClkReqDetect));
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DEBUG ((DEBUG_INFO, " RootPort[%d] UnsupportedRequestReport= %x\n", i, PcieConfig->RootPort[i].UnsupportedRequestReport));
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DEBUG ((DEBUG_INFO, " RootPort[%d] FatalErrorReport= %x\n", i, PcieConfig->RootPort[i].FatalErrorReport));
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DEBUG ((DEBUG_INFO, " RootPort[%d] NoFatalErrorReport= %x\n", i, PcieConfig->RootPort[i].NoFatalErrorReport));
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DEBUG ((DEBUG_INFO, " RootPort[%d] CorrectableErrorReport= %x\n", i, PcieConfig->RootPort[i].CorrectableErrorReport));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SystemErrorOnFatalError= %x\n", i, PcieConfig->RootPort[i].SystemErrorOnFatalError));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SystemErrorOnNonFatalError= %x\n", i, PcieConfig->RootPort[i].SystemErrorOnNonFatalError));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SystemErrorOnCorrectableError= %x\n", i, PcieConfig->RootPort[i].SystemErrorOnCorrectableError));
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DEBUG ((DEBUG_INFO, " RootPort[%d] MaxPayload= %x\n", i, PcieConfig->RootPort[i].MaxPayload));
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DEBUG ((DEBUG_INFO, " RootPort[%d] AcsEnabled= %x\n", i, PcieConfig->RootPort[i].AcsEnabled));
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DEBUG ((DEBUG_INFO, " RootPort[%d] AdvancedErrorReporting= %x\n", i, PcieConfig->RootPort[i].AdvancedErrorReporting));
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DEBUG ((DEBUG_INFO, " RootPort[%d] TransmitterHalfSwing= %x\n", i, PcieConfig->RootPort[i].TransmitterHalfSwing));
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DEBUG ((DEBUG_INFO, " RootPort[%d] PcieSpeed= %x\n", i, PcieConfig->RootPort[i].PcieSpeed));
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DEBUG ((DEBUG_INFO, " RootPort[%d] Gen3EqPh3Method= %x\n", i, PcieConfig->RootPort[i].Gen3EqPh3Method));
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DEBUG ((DEBUG_INFO, " RootPort[%d] PhysicalSlotNumber= %x\n", i, PcieConfig->RootPort[i].PhysicalSlotNumber));
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DEBUG ((DEBUG_INFO, " RootPort[%d] CompletionTimeout= %x\n", i, PcieConfig->RootPort[i].CompletionTimeout));
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DEBUG ((DEBUG_INFO, " RootPort[%d] Aspm= %x\n", i, PcieConfig->RootPort[i].Aspm));
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DEBUG ((DEBUG_INFO, " RootPort[%d] L1Substates= %x\n", i, PcieConfig->RootPort[i].L1Substates));
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DEBUG ((DEBUG_INFO, " RootPort[%d] LtrEnable= %x\n", i, PcieConfig->RootPort[i].LtrEnable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] LtrConfigLock= %x\n", i, PcieConfig->RootPort[i].LtrConfigLock));
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DEBUG ((DEBUG_INFO, " RootPort[%d] LtrMaxSnoopLatency= %x\n", i, PcieConfig->RootPort[i].LtrMaxSnoopLatency));
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DEBUG ((DEBUG_INFO, " RootPort[%d] LtrMaxNoSnoopLatency= %x\n", i, PcieConfig->RootPort[i].LtrMaxNoSnoopLatency));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SnoopLatencyOverrideMode= %x\n", i, PcieConfig->RootPort[i].SnoopLatencyOverrideMode));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SnoopLatencyOverrideMultiplier= %x\n", i, PcieConfig->RootPort[i].SnoopLatencyOverrideMultiplier));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SnoopLatencyOverrideValue= %x\n", i, PcieConfig->RootPort[i].SnoopLatencyOverrideValue));
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DEBUG ((DEBUG_INFO, " RootPort[%d] NonSnoopLatencyOverrideMode= %x\n", i, PcieConfig->RootPort[i].NonSnoopLatencyOverrideMode));
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DEBUG ((DEBUG_INFO, " RootPort[%d] NonSnoopLatencyOverrideMultiplier= %x\n", i, PcieConfig->RootPort[i].NonSnoopLatencyOverrideMultiplier));
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DEBUG ((DEBUG_INFO, " RootPort[%d] NonSnoopLatencyOverrideValue= %x\n", i, PcieConfig->RootPort[i].NonSnoopLatencyOverrideValue));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SlotPowerLimitScale= %x\n", i, PcieConfig->RootPort[i].SlotPowerLimitScale));
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DEBUG ((DEBUG_INFO, " RootPort[%d] SlotPowerLimitValue= %x\n", i, PcieConfig->RootPort[i].SlotPowerLimitValue));
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DEBUG ((DEBUG_INFO, " RootPort[%d] Uptp= %x\n", i, PcieConfig->RootPort[i].Uptp));
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DEBUG ((DEBUG_INFO, " RootPort[%d] Dptp= %x\n", i, PcieConfig->RootPort[i].Dptp));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioRxSetCtleEnable= %x\n", i, HsioPcieConfig->Lane[i].HsioRxSetCtleEnable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioRxSetCtle= %x\n", i, HsioPcieConfig->Lane[i].HsioRxSetCtle));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen1DownscaleAmpEnable= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen1DownscaleAmpEnable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen1DownscaleAmp= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen1DownscaleAmp));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen2DownscaleAmpEnable= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen2DownscaleAmpEnable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen2DownscaleAmp= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen2DownscaleAmp));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen3DownscaleAmpEnable= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen3DownscaleAmpEnable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen3DownscaleAmp= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen3DownscaleAmp));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen1DeEmphEnable= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen1DeEmphEnable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen1DeEmph= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen1DeEmph));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen2DeEmph3p5Enable= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen2DeEmph3p5Enable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen2DeEmph3p5= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen2DeEmph3p5));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen2DeEmph6p0Enable= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen2DeEmph6p0Enable));
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DEBUG ((DEBUG_INFO, " RootPort[%d] HsioTxGen2DeEmph6p0= %x\n", i, HsioPcieConfig->Lane[i].HsioTxGen2DeEmph6p0));
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}
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DEBUG ((DEBUG_INFO, " EnablePort8xhDecode= %x\n", PcieConfig->EnablePort8xhDecode));
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DEBUG ((DEBUG_INFO, " PchPciePort8xhDecodePortIndex= %x\n", PcieConfig->PchPciePort8xhDecodePortIndex));
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DEBUG ((DEBUG_INFO, " DisableRootPortClockGating= %x\n", PcieConfig->DisableRootPortClockGating));
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DEBUG ((DEBUG_INFO, " EnablePeerMemoryWrite= %x\n", PcieConfig->EnablePeerMemoryWrite));
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DEBUG ((DEBUG_INFO, " AllowNoLtrIccPllShutdown= %x\n", PcieConfig->AllowNoLtrIccPllShutdown));
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DEBUG ((DEBUG_INFO, " ComplianceTestMode= %x\n", PcieConfig->ComplianceTestMode));
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DEBUG ((DEBUG_INFO, " RpFunctionSwap= %x\n", PcieConfig->RpFunctionSwap));
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}
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/**
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Print PCH_PCIE_CONFIG2 and serial out.
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@param[in] PcieConfig2 Pointer to a PCH_PCIE_CONFIG2 that provides the platform setting
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**/
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VOID
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PchPrintPcieConfig2 (
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IN CONST PCH_PCIE_CONFIG2 *PcieConfig2
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)
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{
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UINT32 Index;
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DEBUG ((DEBUG_INFO, "------------------ PCH PCIE Config2 -----------------\n"));
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for (Index = 0; Index < PCH_PCIE_SWEQ_COEFFS_MAX; Index++) {
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DEBUG ((DEBUG_INFO, " SwEqCoeffCm[%d] = %x\n", Index, PcieConfig2->SwEqCoeffList[Index].Cm));
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DEBUG ((DEBUG_INFO, " SwEqCoeffCp[%d] = %x\n", Index, PcieConfig2->SwEqCoeffList[Index].Cp));
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}
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}
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/**
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Print PCH_SATA_CONFIG and serial out.
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@param[in] SataConfig Pointer to a PCH_SATA_CONFIG that provides the platform setting
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@param[in] HsioSataConfig Pointer to a PCH_HSIO_SATA_CONFIG that provides the platform setting
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**/
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VOID
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PchPrintSataConfig (
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IN CONST PCH_SATA_CONFIG *SataConfig,
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IN VOID *HsioSataConfigPtr,
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IN UINT8 SataControllerNo
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)
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{
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UINT32 i;
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UINT32 MaxSataPortNum;
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PCH_HSIO_SATA_CONFIG *HsioSataConfig;
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HsioSataConfig = HsioSataConfigPtr;
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if (SataControllerNo == PCH_SATA_FIRST_CONTROLLER) {
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DEBUG ((DEBUG_INFO, "------------------- PCH Primary SATA Config ------------------\n"));
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MaxSataPortNum = GetPchMaxSataPortNum ();
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} else {
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DEBUG ((DEBUG_INFO, "------------------ PCH Secondary SATA Config ------------------\n"));
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MaxSataPortNum = GetPchMaxsSataPortNum ();
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}
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DEBUG ((DEBUG_INFO, " Enable= %x\n", SataConfig->Enable));
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DEBUG ((DEBUG_INFO, " SataMode= %x\n", SataConfig->SataMode));
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for (i = 0; i < MaxSataPortNum; i++) {
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DEBUG ((DEBUG_INFO, " PortSettings[%d] Enabled= %x\n", i, SataConfig->PortSettings[i].Enable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HotPlug= %x\n", i, SataConfig->PortSettings[i].HotPlug));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] InterlockSw= %x\n", i, SataConfig->PortSettings[i].InterlockSw));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] External= %x\n", i, SataConfig->PortSettings[i].External));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] SpinUp= %x\n", i, SataConfig->PortSettings[i].SpinUp));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] SolidStateDrive= %x\n", i, SataConfig->PortSettings[i].SolidStateDrive));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] DevSlp= %x\n", i, SataConfig->PortSettings[i].DevSlp));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] EnableDitoConfig= %x\n", i, SataConfig->PortSettings[i].EnableDitoConfig));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] DmVal= %x\n", i, SataConfig->PortSettings[i].DmVal));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] DitoVal= %x\n", i, SataConfig->PortSettings[i].DitoVal));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] ZpOdd= %x\n", i, SataConfig->PortSettings[i].ZpOdd));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioRxGen1EqBoostMagEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioRxGen1EqBoostMagEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioRxGen1EqBoostMag= %x\n", i, HsioSataConfig->PortLane[i].HsioRxGen1EqBoostMag));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioRxGen2EqBoostMagEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioRxGen2EqBoostMagEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioRxGen2EqBoostMag= %x\n", i, HsioSataConfig->PortLane[i].HsioRxGen2EqBoostMag));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioRxGen3EqBoostMagEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioRxGen3EqBoostMagEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioRxGen3EqBoostMag= %x\n", i, HsioSataConfig->PortLane[i].HsioRxGen3EqBoostMag));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen1DownscaleAmpEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen1DownscaleAmpEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen1DownscaleAmp= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen1DownscaleAmp));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen2DownscaleAmpEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen2DownscaleAmpEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen2DownscaleAmp= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen2DownscaleAmp));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen3DownscaleAmpEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen3DownscaleAmpEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen3DownscaleAmp= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen3DownscaleAmp));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen1DeEmphEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen1DeEmphEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen1DeEmph= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen1DeEmph));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen2DeEmphEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen2DeEmphEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen2DeEmph= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen2DeEmph));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen3DeEmphEnable= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen3DeEmphEnable));
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DEBUG ((DEBUG_INFO, " PortSettings[%d] HsioTxGen3DeEmph= %x\n", i, HsioSataConfig->PortLane[i].HsioTxGen3DeEmph));
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}
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DEBUG ((DEBUG_INFO, " RaidAlternateId= %x\n", SataConfig->Rst.RaidAlternateId));
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DEBUG ((DEBUG_INFO, " Raid0= %x\n", SataConfig->Rst.Raid0));
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DEBUG ((DEBUG_INFO, " Raid1= %x\n", SataConfig->Rst.Raid1));
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DEBUG ((DEBUG_INFO, " Raid10= %x\n", SataConfig->Rst.Raid10));
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DEBUG ((DEBUG_INFO, " Raid5= %x\n", SataConfig->Rst.Raid5));
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DEBUG ((DEBUG_INFO, " Irrt= %x\n", SataConfig->Rst.Irrt));
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DEBUG ((DEBUG_INFO, " OromUiBanner= %x\n", SataConfig->Rst.OromUiBanner));
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DEBUG ((DEBUG_INFO, " OromUiDelay= %x\n", SataConfig->Rst.OromUiDelay));
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DEBUG ((DEBUG_INFO, " HddUnlock= %x\n", SataConfig->Rst.HddUnlock));
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DEBUG ((DEBUG_INFO, " LedLocate= %x\n", SataConfig->Rst.LedLocate));
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DEBUG ((DEBUG_INFO, " IrrtOnly= %x\n", SataConfig->Rst.IrrtOnly));
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DEBUG ((DEBUG_INFO, " SmartStorage= %x\n", SataConfig->Rst.SmartStorage));
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DEBUG ((DEBUG_INFO, " SpeedSupport= %x\n", SataConfig->SpeedLimit));
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DEBUG ((DEBUG_INFO, " eSATASpeedLimit= %x\n", SataConfig->eSATASpeedLimit));
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DEBUG ((DEBUG_INFO, " TestMode= %x\n", SataConfig->TestMode));
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DEBUG ((DEBUG_INFO, " SalpSupport= %x\n", SataConfig->SalpSupport));
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DEBUG ((DEBUG_INFO, " PwrOptEnable= %x\n", SataConfig->PwrOptEnable));
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for (i = 0; i < PCH_MAX_RST_PCIE_STORAGE_CR; i++) {
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DEBUG ((DEBUG_INFO, " RstPcieStorageRemap[%d].Enable = %x\n", i, SataConfig->RstPcieStorageRemap[i].Enable));
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DEBUG ((DEBUG_INFO, " RstPcieStorageRemap[%d].RstPcieStoragePort = %x\n", i, SataConfig->RstPcieStorageRemap[i].RstPcieStoragePort));
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DEBUG ((DEBUG_INFO, " RstPcieStorageRemap[%d].DeviceResetDelay = %x\n", i, SataConfig->RstPcieStorageRemap[i].DeviceResetDelay));
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}
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}
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/**
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Print PCH_IOAPIC_CONFIG and serial out.
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@param[in] IoApicConfig Pointer to a PCH_IOAPIC_CONFIG that provides the platform setting
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**/
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VOID
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PchPrintIoApicConfig (
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IN CONST PCH_IOAPIC_CONFIG *IoApicConfig
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)
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{
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DEBUG ((DEBUG_INFO, "------------------ PCH IOAPIC Config ------------------\n"));
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DEBUG ((DEBUG_INFO, " BdfValid= %x\n", IoApicConfig->BdfValid));
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DEBUG ((DEBUG_INFO, " BusNumber= %x\n", IoApicConfig->BusNumber));
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DEBUG ((DEBUG_INFO, " DeviceNumber= %x\n", IoApicConfig->DeviceNumber));
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DEBUG ((DEBUG_INFO, " FunctionNumber= %x\n", IoApicConfig->FunctionNumber));
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DEBUG ((DEBUG_INFO, " IoApicId= %x\n", IoApicConfig->IoApicId));
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DEBUG ((DEBUG_INFO, " ApicRangeSelect= %x\n", IoApicConfig->ApicRangeSelect));
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DEBUG ((DEBUG_INFO, " IoApicEntry24_119= %x\n", IoApicConfig->IoApicEntry24_119));
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}
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/**
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Print PCH_HPET_CONFIG and serial out.
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@param[in] HpetConfig Pointer to a PCH_HPET_CONFIG that provides the platform setting
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**/
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VOID
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PchPrintHpetConfig (
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IN CONST PCH_HPET_CONFIG *HpetConfig
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)
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{
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DEBUG ((DEBUG_INFO, "------------------ PCH HPET Config ------------------\n"));
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DEBUG ((DEBUG_INFO, " Enable %x\n", HpetConfig->Enable));
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DEBUG ((DEBUG_INFO, " BdfValid %x\n", HpetConfig->BdfValid));
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DEBUG ((DEBUG_INFO, " BusNumber %x\n", HpetConfig->BusNumber));
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DEBUG ((DEBUG_INFO, " DeviceNumber %x\n", HpetConfig->DeviceNumber));
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DEBUG ((DEBUG_INFO, " FunctionNumber %x\n", HpetConfig->FunctionNumber));
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DEBUG ((DEBUG_INFO, " Base %x\n", HpetConfig->Base));
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}
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/**
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Print PCH_LOCK_DOWN_CONFIG and serial out.
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@param[in] LockDownConfig Pointer to a PCH_LOCK_DOWN_CONFIG that provides the platform setting
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**/
|
VOID
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PchPrintLockDownConfig (
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IN CONST PCH_LOCK_DOWN_CONFIG *LockDownConfig
|
)
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{
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DEBUG ((DEBUG_INFO, "------------------ PCH Lock Down Config ------------------\n"));
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DEBUG ((DEBUG_INFO, " GlobalSmi= %x\n", LockDownConfig->GlobalSmi));
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DEBUG ((DEBUG_INFO, " BiosInterface= %x\n", LockDownConfig->BiosInterface));
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DEBUG ((DEBUG_INFO, " RtcLock= %x\n", LockDownConfig->RtcLock));
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DEBUG ((DEBUG_INFO, " BiosLock= %x\n", LockDownConfig->BiosLock));
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DEBUG ((DEBUG_INFO, " SpiEiss= %x\n", LockDownConfig->SpiEiss));
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}
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/**
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Print PCH_SMBUS_CONFIG and serial out.
|
|
@param[in] SmbusConfig Pointer to a PCH_SMBUS_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintSmbusConfig (
|
IN CONST PCH_SMBUS_CONFIG *SmbusConfig
|
)
|
{
|
UINT32 i;
|
|
DEBUG ((DEBUG_INFO, "------------------ PCH SMBUS Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " Enable= %x\n", SmbusConfig->Enable));
|
DEBUG ((DEBUG_INFO, " ArpEnable= %x\n", SmbusConfig->ArpEnable));
|
DEBUG ((DEBUG_INFO, " DynamicPowerGating= %x\n", SmbusConfig->DynamicPowerGating));
|
DEBUG ((DEBUG_INFO, " SmbusIoBase= %x\n", SmbusConfig->SmbusIoBase));
|
DEBUG ((DEBUG_INFO, " NumRsvdSmbusAddresses= %x\n", SmbusConfig->NumRsvdSmbusAddresses));
|
DEBUG ((DEBUG_INFO, " RsvdSmbusAddressTable= {"));
|
for (i = 0; i < SmbusConfig->NumRsvdSmbusAddresses; ++i) {
|
DEBUG ((DEBUG_INFO, " %02xh", SmbusConfig->RsvdSmbusAddressTable[i]));
|
}
|
DEBUG ((DEBUG_INFO, " }\n"));
|
}
|
|
/**
|
Print PCH_HDAUDIO_CONFIG and serial out.
|
|
@param[in] HdaConfig Pointer to a PCH_HDAUDIO_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintHdAudioConfig (
|
IN CONST PCH_HDAUDIO_CONFIG *HdaConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH HD-Audio Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " HDA Enable = %x\n", HdaConfig->Enable));
|
DEBUG ((DEBUG_INFO, " DSP Enable = %x\n", HdaConfig->DspEnable));
|
DEBUG ((DEBUG_INFO, " DSP UAA Compliance = %x\n", HdaConfig->DspUaaCompliance));
|
DEBUG ((DEBUG_INFO, " iDisp Codec Disconnect = %x\n", HdaConfig->IDispCodecDisconnect));
|
DEBUG ((DEBUG_INFO, " Pme = %x\n", HdaConfig->Pme));
|
DEBUG ((DEBUG_INFO, " I/O Buffer Ownership = %x\n", HdaConfig->IoBufferOwnership));
|
DEBUG ((DEBUG_INFO, " I/O Buffer Voltage = %x\n", HdaConfig->IoBufferVoltage));
|
DEBUG ((DEBUG_INFO, " VC Type = %x\n", HdaConfig->VcType));
|
DEBUG ((DEBUG_INFO, " HD-A Link Frequency = %x\n", HdaConfig->HdAudioLinkFrequency));
|
DEBUG ((DEBUG_INFO, " iDisp Link Frequency = %x\n", HdaConfig->IDispLinkFrequency));
|
DEBUG ((DEBUG_INFO, " iDisp Link T-Mode = %x\n", HdaConfig->IDispLinkTmode));
|
DEBUG ((DEBUG_INFO, " DSP Endpoint DMIC = %x\n", HdaConfig->DspEndpointDmic));
|
DEBUG ((DEBUG_INFO, " DSP Endpoint I2S = %x\n", HdaConfig->DspEndpointI2s));
|
DEBUG ((DEBUG_INFO, " DSP Endpoint BT = %x\n", HdaConfig->DspEndpointBluetooth));
|
DEBUG ((DEBUG_INFO, " DSP Feature Mask = %x\n", HdaConfig->DspFeatureMask));
|
DEBUG ((DEBUG_INFO, " DSP PP Module Mask = %x\n", HdaConfig->DspPpModuleMask));
|
DEBUG ((DEBUG_INFO, " ResetWaitTimer = %x\n", HdaConfig->ResetWaitTimer));
|
}
|
|
/**
|
Print PCH_PM_CONFIG and serial out.
|
|
@param[in] PmConfig Pointer to a PCH_PM_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintPmConfig (
|
IN CONST PCH_PM_CONFIG *PmConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH PM Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " PowerResetStatusClear MeWakeSts = %x\n", PmConfig->PowerResetStatusClear.MeWakeSts));
|
DEBUG ((DEBUG_INFO, " PowerResetStatusClear MeHrstColdSts = %x\n", PmConfig->PowerResetStatusClear.MeHrstColdSts));
|
DEBUG ((DEBUG_INFO, " PowerResetStatusClear MeHrstWarmSts = %x\n", PmConfig->PowerResetStatusClear.MeHrstWarmSts));
|
DEBUG ((DEBUG_INFO, " PowerResetStatusClear MeHostPowerDn = %x\n", PmConfig->PowerResetStatusClear.MeHostPowerDn));
|
DEBUG ((DEBUG_INFO, " PowerResetStatusClear WolOvrWkSts = %x\n", PmConfig->PowerResetStatusClear.WolOvrWkSts));
|
|
DEBUG ((DEBUG_INFO, " WakeConfig PmeB0S5Dis = %x\n", PmConfig->WakeConfig.PmeB0S5Dis));
|
DEBUG ((DEBUG_INFO, " WakeConfig WolEnableOverride = %x\n", PmConfig->WakeConfig.WolEnableOverride));
|
DEBUG ((DEBUG_INFO, " WakeConfig LanWakeFromDeepSx = %x\n", PmConfig->WakeConfig.LanWakeFromDeepSx));
|
DEBUG ((DEBUG_INFO, " WakeConfig PcieWakeFromDeepSx = %x\n", PmConfig->WakeConfig.PcieWakeFromDeepSx));
|
DEBUG ((DEBUG_INFO, " WakeConfig WoWlanEnable = %x\n", PmConfig->WakeConfig.WoWlanEnable));
|
DEBUG ((DEBUG_INFO, " WakeConfig WoWlanDeepSxEnable = %x\n", PmConfig->WakeConfig.WoWlanDeepSxEnable));
|
|
DEBUG ((DEBUG_INFO, " PchDeepSxPol = %x\n", PmConfig->PchDeepSxPol));
|
DEBUG ((DEBUG_INFO, " PchSlpS3MinAssert = %x\n", PmConfig->PchSlpS3MinAssert));
|
DEBUG ((DEBUG_INFO, " PchSlpS4MinAssert = %x\n", PmConfig->PchSlpS4MinAssert));
|
DEBUG ((DEBUG_INFO, " PchSlpSusMinAssert = %x\n", PmConfig->PchSlpSusMinAssert));
|
DEBUG ((DEBUG_INFO, " PchSlpAMinAssert = %x\n", PmConfig->PchSlpAMinAssert));
|
DEBUG ((DEBUG_INFO, " PciClockRun = %x\n", PmConfig->PciClockRun));
|
DEBUG ((DEBUG_INFO, " SlpStrchSusUp = %x\n", PmConfig->SlpStrchSusUp));
|
DEBUG ((DEBUG_INFO, " SlpLanLowDc = %x\n", PmConfig->SlpLanLowDc));
|
DEBUG ((DEBUG_INFO, " PwrBtnOverridePeriod = %x\n", PmConfig->PwrBtnOverridePeriod));
|
DEBUG ((DEBUG_INFO, " DisableEnergyReport = %x\n", PmConfig->DisableEnergyReport));
|
DEBUG ((DEBUG_INFO, " DisableDsxAcPresentPulldown = %x\n", PmConfig->DisableDsxAcPresentPulldown));
|
DEBUG ((DEBUG_INFO, " PmcReadDisable = %x\n", PmConfig->PmcReadDisable));
|
DEBUG ((DEBUG_INFO, " PchPwrCycDur = %x\n", PmConfig->PchPwrCycDur));
|
DEBUG ((DEBUG_INFO, " PciePllSsc = %x\n", PmConfig->PciePllSsc));
|
DEBUG ((DEBUG_INFO, " CapsuleResetType = %x\n", PmConfig->CapsuleResetType));
|
DEBUG ((DEBUG_INFO, " DisableNativePowerButton = %x\n", PmConfig->DisableNativePowerButton));
|
DEBUG ((DEBUG_INFO, " SlpS0Enabled = %x\n", PmConfig->SlpS0Enable));
|
}
|
|
/**
|
Print PCH_DMI_CONFIG and serial out.
|
|
@param[in] DmiConfig Pointer to a PCH_DMI_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintDmiConfig (
|
IN CONST PCH_DMI_CONFIG *DmiConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH DMI Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " DmiAspm= %x\n", DmiConfig->DmiAspm));
|
DEBUG ((DEBUG_INFO, " PwrOptEnable= %x\n", DmiConfig->PwrOptEnable));
|
|
}
|
|
/**
|
Print PCH_LPC_SIRQ_CONFIG and serial out.
|
|
@param[in] SerialIrqConfig Pointer to a PCH_LPC_SIRQ_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintSerialIrqConfig (
|
IN CONST PCH_LPC_SIRQ_CONFIG *SerialIrqConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH LPC SIRQ Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " SirqEnable= %x\n", SerialIrqConfig->SirqEnable));
|
DEBUG ((DEBUG_INFO, " SirqMode= %x\n", SerialIrqConfig->SirqMode));
|
DEBUG ((DEBUG_INFO, " StartFramePulse= %x\n", SerialIrqConfig->StartFramePulse));
|
}
|
|
/**
|
Print PCH_THERMAL_CONFIG and serial out.
|
|
@param[in] ThermalConfig Pointer to a PCH_THERMAL_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintThermalConfig (
|
IN CONST PCH_THERMAL_CONFIG *ThermalConfig
|
)
|
{
|
UINTN i;
|
|
DEBUG ((DEBUG_INFO, "------------------ PCH Thermal Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " TsmicLock= %x\n", ThermalConfig->TsmicLock));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels T0Level %x centigrade degree\n", ThermalConfig->ThermalThrottling.TTLevels.T0Level));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels T1Level %x centigrade degree\n", ThermalConfig->ThermalThrottling.TTLevels.T1Level));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels T2Level %x centigrade degree\n", ThermalConfig->ThermalThrottling.TTLevels.T2Level));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels TTEnable %x\n", ThermalConfig->ThermalThrottling.TTLevels.TTEnable));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels TTState13Enable %x\n", ThermalConfig->ThermalThrottling.TTLevels.TTState13Enable));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels TTLock %x\n", ThermalConfig->ThermalThrottling.TTLevels.TTLock));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels SuggestedSetting %x\n", ThermalConfig->ThermalThrottling.TTLevels.SuggestedSetting));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling TTLevels PchCrossThrottling %x\n", ThermalConfig->ThermalThrottling.TTLevels.PchCrossThrottling));
|
|
DEBUG ((DEBUG_INFO, " ThermalThrottling DmiHaAWC DmiTsawEn %x\n", ThermalConfig->ThermalThrottling.DmiHaAWC.DmiTsawEn));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling DmiHaAWC TS0TW %x\n", ThermalConfig->ThermalThrottling.DmiHaAWC.TS0TW));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling DmiHaAWC TS1TW %x\n", ThermalConfig->ThermalThrottling.DmiHaAWC.TS1TW));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling DmiHaAWC TS2TW %x\n", ThermalConfig->ThermalThrottling.DmiHaAWC.TS2TW));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling DmiHaAWC TS3TW %x\n", ThermalConfig->ThermalThrottling.DmiHaAWC.TS3TW));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling DmiHaAWC SuggestedSetting %x\n", ThermalConfig->ThermalThrottling.DmiHaAWC.SuggestedSetting));
|
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P0T1M %x\n", ThermalConfig->ThermalThrottling.SataTT.P0T1M));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P0T2M %x\n", ThermalConfig->ThermalThrottling.SataTT.P0T2M));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P0T3M %x\n", ThermalConfig->ThermalThrottling.SataTT.P0T3M));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P0TDisp %x\n", ThermalConfig->ThermalThrottling.SataTT.P0TDisp));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P0Tinact %x\n", ThermalConfig->ThermalThrottling.SataTT.P0Tinact));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P0TDispFinit %x\n", ThermalConfig->ThermalThrottling.SataTT.P0TDispFinit));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P1T1M %x\n", ThermalConfig->ThermalThrottling.SataTT.P1T1M));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P1T2M %x\n", ThermalConfig->ThermalThrottling.SataTT.P1T2M));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P1T3M %x\n", ThermalConfig->ThermalThrottling.SataTT.P1T3M));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P1TDisp %x\n", ThermalConfig->ThermalThrottling.SataTT.P1TDisp));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P1Tinact %x\n", ThermalConfig->ThermalThrottling.SataTT.P1Tinact));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT P1TDispFinit %x\n", ThermalConfig->ThermalThrottling.SataTT.P1TDispFinit));
|
DEBUG ((DEBUG_INFO, " ThermalThrottling SataTT SuggestedSetting %x\n", ThermalConfig->ThermalThrottling.SataTT.SuggestedSetting));
|
|
DEBUG ((DEBUG_INFO, " MemoryThrottling Enable= %x\n", ThermalConfig->MemoryThrottling.Enable));
|
for (i = 0; i < MaxTsGpioPin; i++) {
|
DEBUG ((DEBUG_INFO, " MemoryThrottling TsGpioPinSetting PmsyncEnable= %x\n", ThermalConfig->MemoryThrottling.TsGpioPinSetting[i].PmsyncEnable));
|
DEBUG ((DEBUG_INFO, " MemoryThrottling TsGpioPinSetting C0TransmitEnable= %x\n", ThermalConfig->MemoryThrottling.TsGpioPinSetting[i].C0TransmitEnable));
|
DEBUG ((DEBUG_INFO, " MemoryThrottling TsGpioPinSetting PinSelection= %x\n", ThermalConfig->MemoryThrottling.TsGpioPinSetting[i].PinSelection));
|
}
|
DEBUG ((DEBUG_INFO, " PchHotLevel = %x\n", ThermalConfig->PchHotLevel));
|
DEBUG ((DEBUG_INFO, " ThermalDeviceEnable %x\n", ThermalConfig->ThermalDeviceEnable));
|
}
|
|
/**
|
Print PCH_GENERAL_CONFIG and serial out.
|
|
@param[in] PchConfig Pointer to a PCH_GENERAL_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintGeneralConfig (
|
IN CONST PCH_GENERAL_CONFIG *PchConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH General Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " SubSystemVendorId= %x\n", PchConfig->SubSystemVendorId));
|
DEBUG ((DEBUG_INFO, " SubSystemId= %x\n", PchConfig->SubSystemId));
|
DEBUG ((DEBUG_INFO, " Crid= %x\n", PchConfig->Crid));
|
}
|
|
/**
|
Print PCH_LAN_CONFIG and serial out.
|
|
@param[in] LanConfig Pointer to a PCH_LAN_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintLanConfig (
|
IN CONST PCH_LAN_CONFIG *LanConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH LAN Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " Enable= %x\n", LanConfig->Enable));
|
DEBUG ((DEBUG_INFO, " K1OffEnable= %x\n", LanConfig->K1OffEnable));
|
DEBUG ((DEBUG_INFO, " ClkReqSupported= %d\n", LanConfig->ClkReqSupported));
|
DEBUG ((DEBUG_INFO, " ClkReqNumber= %d\n", LanConfig->ClkReqNumber));
|
}
|
|
|
/**
|
Print PCH_INTERRUPT_CONFIG and serial out
|
|
@param[in] InterruptConfig Pointer to Interrupt Configuration structure
|
|
**/
|
VOID
|
PchPrintInterruptConfig (
|
IN CONST PCH_INTERRUPT_CONFIG *InterruptConfig
|
)
|
{
|
UINTN i;
|
//
|
// Print interrupt information
|
//
|
DEBUG ((DEBUG_INFO, "------------------ PCH Interrupt Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, " Interrupt assignment:\n"));
|
DEBUG ((DEBUG_INFO, " Dxx:Fx INTx IRQ\n"));
|
for (i = 0; i < InterruptConfig->NumOfDevIntConfig; i++) {
|
DEBUG ((DEBUG_INFO, " D%02d:F%d %d %03d\n",
|
InterruptConfig->DevIntConfig[i].Device,
|
InterruptConfig->DevIntConfig[i].Function,
|
InterruptConfig->DevIntConfig[i].IntX,
|
InterruptConfig->DevIntConfig[i].Irq));
|
}
|
DEBUG ((DEBUG_INFO, " Legacy PIC interrupt routing:\n"));
|
DEBUG ((DEBUG_INFO, " PIRQx IRQx\n"));
|
for (i = 0; i < PCH_MAX_PXRC_CONFIG; i++) {
|
DEBUG ((DEBUG_INFO, " PIRQ%c -> IRQ%d\n", i + 65, InterruptConfig->PxRcConfig[i]));
|
}
|
DEBUG ((DEBUG_INFO, " Other interrupt configuration:\n"));
|
DEBUG ((DEBUG_INFO, " GpioIrqRoute= %d\n", InterruptConfig->GpioIrqRoute));
|
DEBUG ((DEBUG_INFO, " SciIrqSelect= %d\n", InterruptConfig->SciIrqSelect));
|
DEBUG ((DEBUG_INFO, " TcoIrqEnable= %d\n", InterruptConfig->TcoIrqEnable));
|
DEBUG ((DEBUG_INFO, " TcoIrqSelect= %d\n", InterruptConfig->TcoIrqSelect));
|
}
|
|
|
/**
|
Print PCH_FLASH_PROTECTION_CONFIG and serial out.
|
|
@param[in] FlashProtectConfig Pointer to a PCH_FLASH_PROTECTION_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintFlashProtectionConfig (
|
IN CONST PCH_FLASH_PROTECTION_CONFIG *FlashProtectConfig
|
)
|
{
|
UINT32 i;
|
|
DEBUG ((DEBUG_INFO, "------------------ PCH Flash Protection Config ------------------\n"));
|
for (i = 0; i < PCH_FLASH_PROTECTED_RANGES; ++i) {
|
DEBUG ((DEBUG_INFO, " WriteProtectionEnable[%d]= %x\n", i, FlashProtectConfig->ProtectRange[i].WriteProtectionEnable));
|
DEBUG ((DEBUG_INFO, " ReadProtectionEnable[%d]= %x\n", i, FlashProtectConfig->ProtectRange[i].ReadProtectionEnable));
|
DEBUG ((DEBUG_INFO, " ProtectedRangeLimit[%d]= %x\n", i, FlashProtectConfig->ProtectRange[i].ProtectedRangeLimit));
|
DEBUG ((DEBUG_INFO, " ProtectedRangeBase[%d]= %x\n", i, FlashProtectConfig->ProtectRange[i].ProtectedRangeBase));
|
}
|
}
|
|
/**
|
Print PCH_WDT_CONFIG and serial out.
|
|
@param[in] WdtConfig Pointer to a PCH_WDT_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintWdtConfig (
|
IN CONST PCH_WDT_CONFIG *WdtConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH WDT Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, "DisableAndLock= %x\n", WdtConfig->DisableAndLock));
|
}
|
|
/**
|
Print PCH_P2SB_CONFIG and serial out.
|
|
@param[in] P2sbConfig Pointer to a PCH_P2SB_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintP2sbConfig (
|
IN CONST PCH_P2SB_CONFIG *P2sbConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH P2SB Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, "SbiUnlock= %x\n", P2sbConfig->SbiUnlock));
|
DEBUG ((DEBUG_INFO, "PsfUnlock= %x\n", P2sbConfig->PsfUnlock));
|
}
|
|
/**
|
Print PCH_DCI_CONFIG and serial out.
|
|
@param[in] DciConfig Pointer to a PCH_DCI_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintDciConfig (
|
IN CONST PCH_DCI_CONFIG *DciConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH DCI Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, "DciEn= %x\n", DciConfig->DciEn));
|
DEBUG ((DEBUG_INFO, "DciAutoDetect= %x\n", DciConfig->DciAutoDetect));
|
}
|
|
/**
|
Print PCH_LPC_CONFIG and serial out.
|
|
@param[in] LpcConfig Pointer to a PCH_LPC_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintLpcConfig (
|
IN CONST PCH_LPC_CONFIG *LpcConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH LPC Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, "EnhancePort8xhDecoding= %x\n", LpcConfig->EnhancePort8xhDecoding));
|
}
|
|
/**
|
Print PCH_SPI_CONFIG and serial out.
|
|
@param[in] SpiConfig Pointer to a PCH_SPI_CONFIG that provides the platform setting
|
|
**/
|
VOID
|
PchPrintSpiConfig (
|
IN CONST PCH_SPI_CONFIG *SpiConfig
|
)
|
{
|
DEBUG ((DEBUG_INFO, "------------------ PCH SPI Config ------------------\n"));
|
DEBUG ((DEBUG_INFO, "ShowSpiController= %x\n", SpiConfig->ShowSpiController));
|
}
|
|
/**
|
Print whole PCH_POLICY_PPI and serial out.
|
|
@param[in] PchPolicyPpi The RC Policy PPI instance
|
|
**/
|
VOID
|
PchPrintPolicyPpi (
|
IN PCH_POLICY_PPI *PchPolicyPpi
|
)
|
{
|
DEBUG_CODE_BEGIN();
|
DEBUG ((DEBUG_INFO, "------------------------ PCH Print Platform Protocol Start ------------------------\n"));
|
DEBUG ((DEBUG_INFO, " Revision= %x\n", PchPolicyPpi->Revision));
|
DEBUG ((DEBUG_INFO, " Port80Route= %x\n", PchPolicyPpi->Port80Route));
|
DEBUG ((DEBUG_INFO, " AcpiBase= %x\n", PchPolicyPpi->AcpiBase));
|
|
PchPrintGeneralConfig (&PchPolicyPpi->PchConfig);
|
|
PchPrintPcieConfig (&PchPolicyPpi->PcieConfig, &PchPolicyPpi->HsioPcieConfig);
|
|
PchPrintPcieConfig2 (&PchPolicyPpi->PcieConfig2);
|
|
PchPrintSataConfig (&PchPolicyPpi->SataConfig, &PchPolicyPpi->HsioSataConfig, PCH_SATA_FIRST_CONTROLLER);
|
PchPrintSataConfig (&PchPolicyPpi->sSataConfig, &PchPolicyPpi->HsiosSataConfig, PCH_SATA_SECOND_CONTROLLER);
|
PchPrintUsbConfig (&PchPolicyPpi->UsbConfig);
|
|
PchPrintIoApicConfig (&PchPolicyPpi->IoApicConfig);
|
|
PchPrintHpetConfig (&PchPolicyPpi->HpetConfig);
|
|
PchPrintHdAudioConfig (&PchPolicyPpi->HdAudioConfig);
|
|
PchPrintLanConfig (&PchPolicyPpi->LanConfig);
|
|
PchPrintSmbusConfig (&PchPolicyPpi->SmbusConfig);
|
|
PchPrintLockDownConfig (&PchPolicyPpi->LockDownConfig);
|
|
PchPrintThermalConfig (&PchPolicyPpi->ThermalConfig);
|
|
PchPrintPmConfig (&PchPolicyPpi->PmConfig);
|
|
PchPrintDmiConfig (&PchPolicyPpi->DmiConfig);
|
|
PchPrintSerialIrqConfig (&PchPolicyPpi->SerialIrqConfig);
|
|
|
PchPrintFlashProtectionConfig (&PchPolicyPpi->FlashProtectConfig);
|
|
PchPrintWdtConfig (&PchPolicyPpi->WdtConfig);
|
|
PchPrintP2sbConfig (&PchPolicyPpi->P2sbConfig);
|
|
PchPrintDciConfig (&PchPolicyPpi->DciConfig);
|
|
PchPrintLpcConfig (&PchPolicyPpi->LpcConfig);
|
|
PchPrintSpiConfig (&PchPolicyPpi->SpiConfig);
|
|
DEBUG ((DEBUG_INFO, "------------------------ PCH Print Platform Protocol End --------------------------\n"));
|
DEBUG_CODE_END();
|
}
|
