/** @file
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This is the driver that publishes the SMM Access Protocol
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instance for System Agent.
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Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "SmmAccessDriver.h"
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static SMM_ACCESS_PRIVATE_DATA mSmmAccess;
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/**
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This is the standard EFI driver point that
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installs an SMM Access Protocol
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@param[in] ImageHandle - Handle for the image of this driver
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@param[in] SystemTable - Pointer to the EFI System Table
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@retval EFI_SUCCESS - Protocol was installed successfully
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@exception EFI_UNSUPPORTED - Protocol was not installed
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@retval EFI_NOT_FOUND - Protocol can't be found.
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@retval EFI_OUT_OF_RESOURCES - Protocol does not have enough resources to initialize the driver.
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**/
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EFI_STATUS
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EFIAPI
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SmmAccessDriverEntryPoint (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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UINTN Index;
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EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock;
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EFI_PEI_HOB_POINTERS *Hob;
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///
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/// --cr-- INITIALIZE_SCRIPT (ImageHandle, SystemTable);
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///
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/// Initialize Global variables
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///
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ZeroMem (&mSmmAccess, sizeof (mSmmAccess));
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Status = gBS->LocateProtocol (
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&gEfiPciRootBridgeIoProtocolGuid,
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NULL,
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(VOID **) &PciRootBridgeIo
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Could not locate PCI Root Bridge IO Protocol\n"));
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return EFI_NOT_FOUND;
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}
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mSmmAccess.Signature = SMM_ACCESS_PRIVATE_DATA_SIGNATURE;
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mSmmAccess.Handle = NULL;
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mSmmAccess.PciRootBridgeIo = PciRootBridgeIo;
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///
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/// Get Hob list
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///
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Hob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid);
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if (Hob == NULL) {
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DEBUG ((DEBUG_ERROR, "SmramMemoryReserve HOB not found\n"));
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return EFI_NOT_FOUND;
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}
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DescriptorBlock = (VOID *) ((UINT8 *) Hob + sizeof (EFI_HOB_GUID_TYPE));
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///
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/// Alloc space for mSmmAccess.SmramDesc
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///
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mSmmAccess.SmramDesc = AllocateZeroPool ((DescriptorBlock->NumberOfSmmReservedRegions) * sizeof (EFI_SMRAM_DESCRIPTOR));
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if (mSmmAccess.SmramDesc == NULL) {
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DEBUG ((DEBUG_ERROR, "Alloc mSmmAccess.SmramDesc fail.\n"));
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return EFI_OUT_OF_RESOURCES;
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}
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DEBUG ((DEBUG_INFO, "Alloc mSmmAccess.SmramDesc success.\n"));
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///
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/// Use the HOB to publish SMRAM capabilities
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///
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for (Index = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) {
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mSmmAccess.SmramDesc[Index].PhysicalStart = DescriptorBlock->Descriptor[Index].PhysicalStart;
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mSmmAccess.SmramDesc[Index].CpuStart = DescriptorBlock->Descriptor[Index].CpuStart;
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mSmmAccess.SmramDesc[Index].PhysicalSize = DescriptorBlock->Descriptor[Index].PhysicalSize;
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mSmmAccess.SmramDesc[Index].RegionState = DescriptorBlock->Descriptor[Index].RegionState;
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}
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mSmmAccess.NumberRegions = Index;
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mSmmAccess.SmmAccess.Open = Open;
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mSmmAccess.SmmAccess.Close = Close;
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mSmmAccess.SmmAccess.Lock = Lock;
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mSmmAccess.SmmAccess.GetCapabilities = GetCapabilities;
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mSmmAccess.SmmAccess.LockState = FALSE;
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mSmmAccess.SmmAccess.OpenState = FALSE;
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///
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/// Install our protocol interfaces on the device's handle
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///
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Status = gBS->InstallMultipleProtocolInterfaces (
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&mSmmAccess.Handle,
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&gEfiSmmAccess2ProtocolGuid,
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&mSmmAccess.SmmAccess,
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NULL
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "InstallMultipleProtocolInterfaces returned %r\n", Status));
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return EFI_UNSUPPORTED;
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}
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return EFI_SUCCESS;
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}
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/**
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This routine accepts a request to "open" a region of SMRAM. The
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region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
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The use of "open" means that the memory is visible from all boot-service
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and SMM agents.
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@param[in] This - Pointer to the SMM Access Interface.
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@retval EFI_SUCCESS - The region was successfully opened.
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@retval EFI_DEVICE_ERROR - The region could not be opened because locked by
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chipset.
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@retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
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**/
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EFI_STATUS
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EFIAPI
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Open (
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IN EFI_SMM_ACCESS2_PROTOCOL *This
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)
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{
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EFI_STATUS Status;
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SMM_ACCESS_PRIVATE_DATA *SmmAccess;
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UINT64 Address;
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UINT8 SmramControl;
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UINTN DescriptorIndex;
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SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
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for (DescriptorIndex = 0; DescriptorIndex < SmmAccess->NumberRegions; DescriptorIndex++) {
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if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM_LOCKED) {
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DEBUG ((DEBUG_WARN, "Cannot open a locked SMRAM region\n"));
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return EFI_DEVICE_ERROR;
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}
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}
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///
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/// BEGIN CHIPSET SPECIFIC CODE
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///
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///
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/// SMRAM register is PCI 0:0:0:88, SMRAMC (8 bit)
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///
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Address = EFI_PCI_ADDRESS (SA_MC_BUS, SA_MC_DEV, SA_MC_FUN, R_SA_SMRAMC);
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Status = SmmAccess->PciRootBridgeIo->Pci.Read (
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SmmAccess->PciRootBridgeIo,
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EfiPciWidthUint8,
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Address,
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1,
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&SmramControl
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "SmmAccess->PciRootBridgeIo->Pci.Read returned %r\n", Status));
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return Status;
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}
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///
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/// Is SMRAM locked?
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///
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for (DescriptorIndex = 0; DescriptorIndex < SmmAccess->NumberRegions; DescriptorIndex++) {
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if ((SmramControl & B_SA_SMRAMC_D_LCK_MASK) != 0) {
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///
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/// Cannot Open a locked region
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///
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SmmAccess->SmramDesc[DescriptorIndex].RegionState |= EFI_SMRAM_LOCKED;
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DEBUG ((DEBUG_WARN, "Cannot open a locked SMRAM region\n"));
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return EFI_DEVICE_ERROR;
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}
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}
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///
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/// Open SMRAM region
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///
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SmramControl |= B_SA_SMRAMC_D_OPEN_MASK;
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SmramControl &= ~(B_SA_SMRAMC_D_CLS_MASK);
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Status = SmmAccess->PciRootBridgeIo->Pci.Write (
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SmmAccess->PciRootBridgeIo,
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EfiPciWidthUint8,
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Address,
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1,
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&SmramControl
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "SmmAccess->PciRootBridgeIo->Pci.Write returned %r\n", Status));
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return Status;
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}
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///
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/// END CHIPSET SPECIFIC CODE
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///
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for (DescriptorIndex = 0; DescriptorIndex < SmmAccess->NumberRegions; DescriptorIndex++) {
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SmmAccess->SmramDesc[DescriptorIndex].RegionState &= (UINT64) ~(EFI_SMRAM_CLOSED | EFI_ALLOCATED);
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SmmAccess->SmramDesc[DescriptorIndex].RegionState |= (UINT64) EFI_SMRAM_OPEN;
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}
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SmmAccess->SmmAccess.OpenState = TRUE;
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return EFI_SUCCESS;
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}
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/**
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This routine accepts a request to "close" a region of SMRAM. The
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region could be legacy AB or TSEG near top of physical memory.
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The use of "close" means that the memory is only visible from SMM agents,
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not from BS or RT code.
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@param[in] This - Pointer to the SMM Access Interface.
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@retval EFI_SUCCESS - The region was successfully closed.
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@retval EFI_DEVICE_ERROR - The region could not be closed because locked by chipset.
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@retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
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**/
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EFI_STATUS
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EFIAPI
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Close (
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IN EFI_SMM_ACCESS2_PROTOCOL *This
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)
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{
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EFI_STATUS Status;
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SMM_ACCESS_PRIVATE_DATA *SmmAccess;
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UINT64 Address;
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BOOLEAN OpenState;
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UINT8 Index;
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UINT8 SmramControl;
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UINTN DescriptorIndex;
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SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
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for (DescriptorIndex = 0; DescriptorIndex < SmmAccess->NumberRegions; DescriptorIndex++) {
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if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM_LOCKED) {
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DEBUG ((DEBUG_WARN, "Cannot close a locked SMRAM region\n"));
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continue;
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}
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///
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/// SMRAM register is PCI 0:0:0:88, SMRAMC (8 bit)
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///
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Address = EFI_PCI_ADDRESS (SA_MC_BUS, SA_MC_DEV, SA_MC_FUN, R_SA_SMRAMC);
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Status = SmmAccess->PciRootBridgeIo->Pci.Read (
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SmmAccess->PciRootBridgeIo,
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EfiPciWidthUint8,
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Address,
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1,
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&SmramControl
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "SmmAccess->PciRootBridgeIo->Pci.Read returned %r\n", Status));
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return Status;
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}
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///
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/// Is SMRAM locked?
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///
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if ((SmramControl & B_SA_SMRAMC_D_LCK_MASK) != 0) {
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///
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/// Cannot Close a locked region
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///
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SmmAccess->SmramDesc[DescriptorIndex].RegionState |= EFI_SMRAM_LOCKED;
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DEBUG ((DEBUG_WARN, "Cannot close a locked SMRAM region\n"));
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return EFI_DEVICE_ERROR;
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}
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///
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/// Close SMRAM region
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///
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SmramControl &= ~(B_SA_SMRAMC_D_OPEN_MASK);
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Status = SmmAccess->PciRootBridgeIo->Pci.Write (
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SmmAccess->PciRootBridgeIo,
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EfiPciWidthUint8,
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Address,
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1,
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&SmramControl
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "SmmAccess->PciRootBridgeIo->Pci.Write returned %r\n", Status));
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return Status;
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}
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///
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/// END CHIPSET SPECIFIC CODE
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///
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SmmAccess->SmramDesc[DescriptorIndex].RegionState &= (UINT64) ~EFI_SMRAM_OPEN;
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SmmAccess->SmramDesc[DescriptorIndex].RegionState |= (UINT64) (EFI_SMRAM_CLOSED | EFI_ALLOCATED);
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}
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///
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/// Find out if any regions are still open
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///
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OpenState = FALSE;
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for (Index = 0; Index < mSmmAccess.NumberRegions; Index++) {
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if ((SmmAccess->SmramDesc[Index].RegionState & EFI_SMRAM_OPEN) == EFI_SMRAM_OPEN) {
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OpenState = TRUE;
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}
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}
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SmmAccess->SmmAccess.OpenState = OpenState;
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return EFI_SUCCESS;
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}
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/**
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This routine accepts a request to "lock" SMRAM. The
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region could be legacy AB or TSEG near top of physical memory.
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The use of "lock" means that the memory can no longer be opened
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to BS state..
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@param[in] This - Pointer to the SMM Access Interface.
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@retval EFI_SUCCESS - The region was successfully locked.
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@retval EFI_DEVICE_ERROR - The region could not be locked because at least
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one range is still open.
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@retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds.
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**/
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EFI_STATUS
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EFIAPI
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Lock (
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IN EFI_SMM_ACCESS2_PROTOCOL *This
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)
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{
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EFI_STATUS Status;
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SMM_ACCESS_PRIVATE_DATA *SmmAccess;
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UINT64 Address;
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UINT8 SmramControl;
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UINTN DescriptorIndex;
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SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
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if (SmmAccess->SmmAccess.OpenState) {
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DEBUG ((DEBUG_WARN, "Cannot lock SMRAM when SMRAM regions are still open\n"));
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return EFI_DEVICE_ERROR;
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}
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for (DescriptorIndex = 0; DescriptorIndex < SmmAccess->NumberRegions; DescriptorIndex++) {
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SmmAccess->SmramDesc[DescriptorIndex].RegionState |= EFI_SMRAM_LOCKED;
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}
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SmmAccess->SmmAccess.LockState = TRUE;
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///
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/// SMRAM register is PCI 0:0:0:88, SMRAMC (8 bit)
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///
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Address = EFI_PCI_ADDRESS (SA_MC_BUS, SA_MC_DEV, SA_MC_FUN, R_SA_SMRAMC);
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Status = SmmAccess->PciRootBridgeIo->Pci.Read (
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SmmAccess->PciRootBridgeIo,
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EfiPciWidthUint8,
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Address,
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1,
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&SmramControl
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "SmmAccess->PciRootBridgeIo->Pci.Read returned %r\n", Status));
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return Status;
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}
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///
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/// Lock the SMRAM
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///
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SmramControl |= B_SA_SMRAMC_D_LCK_MASK;
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Status = SmmAccess->PciRootBridgeIo->Pci.Write (
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SmmAccess->PciRootBridgeIo,
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EfiPciWidthUint8,
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Address,
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1,
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&SmramControl
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "SmmAccess->PciRootBridgeIo->Pci.Write returned %r\n", Status));
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return Status;
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}
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///
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/// END CHIPSET SPECIFIC CODE
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///
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return EFI_SUCCESS;
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}
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/**
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This routine services a user request to discover the SMRAM
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capabilities of this platform. This will report the possible
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ranges that are possible for SMRAM access, based upon the
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memory controller capabilities.
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@param[in] This - Pointer to the SMRAM Access Interface.
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@param[in] SmramMapSize - Pointer to the variable containing size of the
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buffer to contain the description information.
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@param[in] SmramMap - Buffer containing the data describing the Smram
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region descriptors.
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@retval EFI_BUFFER_TOO_SMALL - The user did not provide a sufficient buffer.
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@retval EFI_SUCCESS - The user provided a sufficiently-sized buffer.
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**/
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EFI_STATUS
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EFIAPI
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GetCapabilities (
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IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,
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IN OUT UINTN *SmramMapSize,
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IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
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)
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{
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EFI_STATUS Status;
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SMM_ACCESS_PRIVATE_DATA *SmmAccess;
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UINTN NecessaryBufferSize;
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SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);
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NecessaryBufferSize = SmmAccess->NumberRegions * sizeof (EFI_SMRAM_DESCRIPTOR);
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if (*SmramMapSize < NecessaryBufferSize) {
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DEBUG ((DEBUG_WARN, "SMRAM Map Buffer too small\n"));
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Status = EFI_BUFFER_TOO_SMALL;
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} else {
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CopyMem (SmramMap, SmmAccess->SmramDesc, NecessaryBufferSize);
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Status = EFI_SUCCESS;
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}
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*SmramMapSize = NecessaryBufferSize;
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return Status;
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}
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