/** @file
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This file is part of the IGD OpRegion Implementation. The IGD OpRegion is
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an interface between system BIOS, ASL code, and Graphics drivers.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Specification Reference:
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- IGD OpRegion/Software SCI SPEC
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**/
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#ifndef _IGD_OPREGION_PROTOCOL_H_
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#define _IGD_OPREGION_PROTOCOL_H_
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extern EFI_GUID gIgdOpRegionProtocolGuid;
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/**
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Protocol data definitions
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OpRegion structures:
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Sub-structures define the different parts of the OpRegion followed by the
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main structure representing the entire OpRegion.
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Note: These structures are packed to 1 byte offsets because the exact
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data location is requred by the supporting design specification due to
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the fact that the data is used by ASL and Graphics driver code compiled
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separatly.
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**/
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#pragma pack(1)
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///
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/// OpRegion header (mailbox 0) structure and defines.
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///
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typedef struct {
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CHAR8 SIGN[0x10]; ///< Offset 0 OpRegion signature
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UINT32 SIZE; ///< Offset 16 OpRegion size
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UINT32 OVER; ///< Offset 20 OpRegion structure version
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UINT8 SVER[0x20]; ///< Offset 24 System BIOS build version
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UINT8 VVER[0x10]; ///< Offset 56 Video BIOS build version
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UINT8 GVER[0x10]; ///< Offset 72 Graphic driver build version
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UINT32 MBOX; ///< Offset 88 Mailboxes supported
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UINT32 DMOD; ///< Offset 92 Driver Model
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UINT32 PCON; ///< Offset 96 Platform Capabilities
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CHAR16 DVER[0x10]; ///< Offset 100 GOP Version
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UINT8 RHD1[0x7C]; ///< Offset 132 Reserved
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} OPREGION_HEADER;
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#pragma pack()
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#pragma pack(1)
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///
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/// OpRegion mailbox 1 (public ACPI Methods).
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///
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typedef struct {
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UINT32 DRDY; ///< Offset 0 Driver readiness
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UINT32 CSTS; ///< Offset 4 Status
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UINT32 CEVT; ///< Offset 8 Current event
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UINT8 RM11[0x14]; ///< Offset 12 Reserved
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UINT32 DIDL; ///< Offset 32 Supported display device 1
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UINT32 DDL2; ///< Offset 36 Supported display device 2
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UINT32 DDL3; ///< Offset 40 Supported display device 3
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UINT32 DDL4; ///< Offset 44 Supported display device 4
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UINT32 DDL5; ///< Offset 48 Supported display device 5
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UINT32 DDL6; ///< Offset 52 Supported display device 6
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UINT32 DDL7; ///< Offset 56 Supported display device 7
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UINT32 DDL8; ///< Offset 60 Supported display device 8
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UINT32 CPDL; ///< Offset 64 Currently present display device 1
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UINT32 CPL2; ///< Offset 68 Currently present display device 2
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UINT32 CPL3; ///< Offset 72 Currently present display device 3
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UINT32 CPL4; ///< Offset 76 Currently present display device 4
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UINT32 CPL5; ///< Offset 80 Currently present display device 5
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UINT32 CPL6; ///< Offset 84 Currently present display device 6
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UINT32 CPL7; ///< Offset 88 Currently present display device 7
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UINT32 CPL8; ///< Offset 92 Currently present display device 8
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UINT32 CADL; ///< Offset 96 Currently active display device 1
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UINT32 CAL2; ///< Offset 100 Currently active display device 2
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UINT32 CAL3; ///< Offset 104 Currently active display device 3
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UINT32 CAL4; ///< Offset 108 Currently active display device 4
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UINT32 CAL5; ///< Offset 112 Currently active display device 5
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UINT32 CAL6; ///< Offset 116 Currently active display device 6
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UINT32 CAL7; ///< Offset 120 Currently active display device 7
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UINT32 CAL8; ///< Offset 124 Currently active display device 8
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UINT32 NADL; ///< Offset 128 Next active device 1
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UINT32 NDL2; ///< Offset 132 Next active device 2
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UINT32 NDL3; ///< Offset 136 Next active device 3
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UINT32 NDL4; ///< Offset 140 Next active device 4
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UINT32 NDL5; ///< Offset 144 Next active device 5
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UINT32 NDL6; ///< Offset 148 Next active device 6
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UINT32 NDL7; ///< Offset 152 Next active device 7
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UINT32 NDL8; ///< Offset 156 Next active device 8
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UINT32 ASLP; ///< Offset 160 ASL sleep timeout
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UINT32 TIDX; ///< Offset 164 Toggle table index
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UINT32 CHPD; ///< Offset 168 Current hot plug enable indicator
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UINT32 CLID; ///< Offset 172 Current lid state indicator
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UINT32 CDCK; ///< Offset 176 Current docking state indicator
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UINT32 SXSW; ///< Offset 180 Display Switch notification on Sx State resume
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UINT32 EVTS; ///< Offset 184 Events supported by ASL
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UINT32 CNOT; ///< Offset 188 Current OS Notification
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UINT32 NRDY; ///< Offset 192 Reasons for DRDY = 0
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UINT8 RM12[0x3C]; ///< Offset 196 Reserved
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} OPREGION_MBOX1;
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#pragma pack()
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#pragma pack(1)
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///
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/// OpRegion mailbox 2 (Software SCI Interface).
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///
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typedef struct {
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UINT32 SCIC; ///< Offset 0 Software SCI function number parameters
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UINT32 PARM; ///< Offset 4 Software SCI additional parameters
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UINT32 DSLP; ///< Offset 8 Driver sleep timeout
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UINT8 RM21[0xF4]; ///< Offset 12 Reserved
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} OPREGION_MBOX2;
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#pragma pack()
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#pragma pack(1)
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///
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/// OpRegion mailbox 3 (Power Conservation).
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///
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typedef struct {
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UINT32 ARDY; ///< Offset 0 Driver readiness
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UINT32 ASLC; ///< Offset 4 ASLE interrupt command / status
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UINT32 TCHE; ///< Offset 8 Technology enabled indicator
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UINT32 ALSI; ///< Offset 12 Current ALS illuminance reading
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UINT32 BCLP; ///< Offset 16 Backlight britness to set
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UINT32 PFIT; ///< Offset 20 Panel fitting Request
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UINT32 CBLV; ///< Offset 24 Brightness Current State
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UINT16 BCLM[0x14]; ///< Offset 28 Backlight Brightness Level Duty Cycle Mapping Table
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UINT32 CPFM; ///< Offset 68 Panel Fitting Current Mode
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UINT32 EPFM; ///< Offset 72 Enabled Panel Fitting Modes
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UINT8 PLUT[0x4A]; ///< Offset 76 Panel Look Up Table
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UINT32 PFMB; ///< Offset 150 PWM Frequency and Minimum Brightness
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UINT32 CCDV; ///< Offset 154 Color Correction Default Values
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UINT32 PCFT; ///< Offset 158 Power Conservation Features
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UINT32 SROT; ///< Offset 162 Supported Rotation angle
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UINT32 IUER; ///< Offset 166 Intel Ultrabook Event Register
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UINT64 FDSP; ///< Offset 170 FFS Display Physical address
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UINT32 FDSS; ///< Offset 178 FFS Display Size
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UINT8 RM32[0x4A]; ///< Offset 182 Reserved
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} OPREGION_MBOX3;
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#pragma pack()
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#pragma pack(1)
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///
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/// OpRegion mailbox 4 (VBT).
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///
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typedef struct {
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UINT8 GVD1[0x1C00]; ///< Reserved
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} OPREGION_VBT;
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#pragma pack()
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#pragma pack(1)
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///
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/// IGD OpRegion Structure
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///
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typedef struct {
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OPREGION_HEADER Header; ///< OpRegion header
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OPREGION_MBOX1 MBox1; ///< Mailbox 1: Public ACPI Methods
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OPREGION_MBOX2 MBox2; ///< Mailbox 2: Software SCI Inteface
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OPREGION_MBOX3 MBox3; ///< Mailbox 3: Power Conservation
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OPREGION_VBT VBT; ///< VBT: Video BIOS Table (OEM customizable data)
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} IGD_OPREGION_STRUC;
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#pragma pack()
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///
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/// IGD OpRegion Protocol
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///
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typedef struct {
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IGD_OPREGION_STRUC *OpRegion; ///< IGD Operation Region Structure
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} IGD_OPREGION_PROTOCOL;
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#endif
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