/** @file
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Header file for PchPsfPrivateLib.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _PCH_PSF_PRIVATE_LIB_H_
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#define _PCH_PSF_PRIVATE_LIB_H_
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/**
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Hide CIO2 devices PciCfgSpace at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfHideCio2Device (
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VOID
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);
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/**
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Disable CIO2 device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableCio2Device (
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VOID
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);
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/**
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Disable HDAudio device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableHdaDevice (
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VOID
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);
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/**
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Disable xDCI device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableXdciDevice (
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VOID
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);
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/**
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Disable xHCI device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableXhciDevice (
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VOID
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);
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/**
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Disable SATA device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableSataDevice (
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VOID
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);
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typedef enum {
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PchPsfEmmc = 0,
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PchPsfSdio,
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PchPsfSdcard,
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PchPsfUfs,
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PchPsfMaxScsDevNum
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} PCH_PSF_SCS_DEV_NUM;
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/**
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Disable SCS device at PSF level
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@param[in] ScsDevNum SCS Device
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@retval None
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**/
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VOID
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PsfDisableScsDevice (
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IN PCH_PSF_SCS_DEV_NUM ScsDevNum
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);
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/**
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Disable SCS devices BAR1 PSF level
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@param[in] ScsDevNum SCS Device
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@retval None
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**/
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VOID
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PsfDisableScsBar1 (
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IN PCH_PSF_SCS_DEV_NUM ScsDevNum
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);
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/**
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Disable ISH device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableIshDevice (
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VOID
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);
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/**
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Disable ISH BAR1 at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableIshBar1 (
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VOID
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);
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/**
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Disable GbE device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableGbeDevice (
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VOID
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);
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/**
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Disable SMBUS device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableSmbusDevice (
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VOID
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);
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/**
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Disable Thermal device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableThermalDevice (
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VOID
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);
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/**
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Hide Thermal device PciCfgSpace at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfHideThermalDevice (
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VOID
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);
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/**
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Hide TraceHub ACPI devices PciCfgSpace at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfHideTraceHubAcpiDevice (
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VOID
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);
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/**
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This procedure will hide TraceHub PciCfgSpace at PSF level
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@retval None
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**/
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VOID
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PsfHideTraceHubDevice (
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VOID
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);
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/**
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This procedure will reveal TraceHub PciCfgSpace at PSF level
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@retval None
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**/
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VOID
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PsfRevealTraceHubDevice (
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VOID
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);
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/**
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This procedure will disable TraceHub device at PSF level
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableTraceHubDevice (
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VOID
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);
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/**
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Re-enable PCIe Root Port at PSF level after it was disabled
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@param[in] RpIndex PCIe Root Port Index (0 based)
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@retval None
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**/
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VOID
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PsfEnablePcieRootPort (
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IN UINT32 RpIndex
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);
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/**
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Disable PCIe Root Port at PSF level
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@param[in] RpIndex PCIe Root Port Index (0 based)
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@retval None
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**/
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VOID
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PsfDisablePcieRootPort (
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IN UINT32 RpIndex
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);
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/**
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Disable PCIe Root Port at PSF level.
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This function will also perform S3 boot script programming
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@param[in] RpIndex PCIe Root Port Index (0 based)
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@retval None
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**/
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VOID
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PsfDisablePcieRootPortWithS3BootScript (
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IN UINT32 RpIndex
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);
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/**
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Program PSF grant counts for PCI express depending on controllers configuration
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@param[in] Controller PCIe controller index
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@param[in] ControllerConfig Port configuration of controller
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@retval Status
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**/
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EFI_STATUS
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PsfConfigurePcieGrantCounts (
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UINT8 Controller,
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UINT8 ControllerConfig
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);
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/**
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Disable ISM NP Completion Tracking for GbE PSF port
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@param[in] None
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@retval None
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**/
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VOID
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PsfDisableIsmNpCompletionTrackForGbe (
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VOID
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);
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/**
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Program PSF EOI Multicast configuration
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@param[in] None
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@retval None
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**/
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VOID
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PsfSetEoiMulticastConfiguration (
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VOID
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);
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/**
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This function enables EOI message forwarding in PSF for PCIe ports
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for cases where IOAPIC is present behind this root port.
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@param[in] RpIndex Root port index (0 based)
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@retval Status
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**/
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EFI_STATUS
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PsfConfigurEoiForPciePort (
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IN UINT32 RpIndex
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);
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/**
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Reload default RP PSF device number and function number.
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The PSF register doesn't got reset after system reset, which will result in mismatch between
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PSF register setting and PCIE PCR PCD register setting. Reset PSF register in early phase
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to avoid cycle decoding confusing.
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@param[in] None
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@retval Status
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**/
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VOID
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PsfReloadDefaultPcieRpDevFunc (
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VOID
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);
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/**
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Assign new function number for PCIe Port Number.
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This function will also perform S3 boot script programming
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@param[in] RpIndex PCIe Root Port Index (0 based)
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@param[in] NewFunction New Function number
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@retval None
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**/
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VOID
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PsfSetPcieFunctionWithS3BootScript (
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IN UINT32 RpIndex,
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IN UINT32 NewFunction
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);
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/**
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This function enables PCIe Relaxed Order in PSF
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@param[in] None
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@retval None
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**/
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VOID
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PsfEnablePcieRelaxedOrder (
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VOID
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);
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/**
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Configure PSF power management.
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Must be called after all PSF configuration is completed.
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@param[in] None
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@retval None
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**/
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VOID
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PsfConfigurePowerManagement (
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VOID
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);
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/**
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Enable VTd support in PSF.
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@param[in] None
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@retval None
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**/
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VOID
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PchPsfEnableVtd (
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VOID
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);
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/**
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Disable PSF address-based peer-to-peer decoding.
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**/
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VOID
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PchPsfDisableP2pDecoding (
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VOID
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);
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#endif // _PCH_PSF_PRIVATE_LIB_H_
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