/** @file
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Header file for PCH PCI Express helpers library
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _PCH_PCI_EXPRESS_HELPERS_LIB_H_
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#define _PCH_PCI_EXPRESS_HELPERS_LIB_H_
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#include <PchPolicyCommon.h>
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typedef enum {
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TpoScale2us,
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TpoScale10us,
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TpoScale100us,
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TpoScaleMax
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} T_PO_SCALE;
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typedef struct {
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UINT32 Value;
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T_PO_SCALE Scale;
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} T_POWER_ON;
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//
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// Function prototypes
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//
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T_POWER_ON GetTpoCapability (
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UINTN DeviceBase,
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UINT32 L1ssCapOffset
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);
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T_POWER_ON GetTpo (
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UINTN DeviceBase,
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UINT32 L1ssCapOffset
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);
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/*
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Sets Tpower_on in a device
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According to spec, Tpower_on can only be updated while L1_2 is disabled
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@param[in] DeviceBase device base address
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@param[in] L1ssCapOffset offset to L1substates capability in device's extended config space
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@param[in] Tpo value to be programmed into Tpower_on
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*/
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VOID SetTpo (
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UINTN DeviceBase,
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UINT32 L1ssCapOffset,
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T_POWER_ON Tpo
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);
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/*
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Converts Tpower_on from value:scale notation to microseconds
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*/
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UINT32 TpoToUs (
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T_POWER_ON Tpo
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);
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/**
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Find the Offset to a given Capabilities ID
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CAPID list:
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0x01 = PCI Power Management Interface
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0x04 = Slot Identification
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0x05 = MSI Capability
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0x10 = PCI Express Capability
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@param[in] Bus Pci Bus Number
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@param[in] Device Pci Device Number
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@param[in] Function Pci Function Number
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@param[in] CapId CAPID to search for
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@retval 0 CAPID not found
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@retval Other CAPID found, Offset of desired CAPID
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**/
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UINT8
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PcieFindCapId (
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IN UINT8 Bus,
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IN UINT8 Device,
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IN UINT8 Function,
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IN UINT8 CapId
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);
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/**
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Search and return the offset of desired Pci Express Capability ID
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CAPID list:
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0x0001 = Advanced Error Rreporting Capability
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0x0002 = Virtual Channel Capability
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0x0003 = Device Serial Number Capability
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0x0004 = Power Budgeting Capability
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@param[in] Bus Pci Bus Number
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@param[in] Device Pci Device Number
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@param[in] Function Pci Function Number
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@param[in] CapId Extended CAPID to search for
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@retval 0 CAPID not found
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@retval Other CAPID found, Offset of desired CAPID
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**/
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UINT16
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PcieFindExtendedCapId (
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IN UINT8 Bus,
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IN UINT8 Device,
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IN UINT8 Function,
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IN UINT16 CapId
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);
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/**
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This returns ClkReq Number from Port Number
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@param[in] PortIndex PCIe Port Number (Zero Base. Please use 23 for GBe)
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@retval ClkReq Number
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**/
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UINT8
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GetPortClkReqNumber (
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IN UINT8 PortIndex
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);
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/**
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Set Common clock to Root port and Endpoint PCI device
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@param[in] Bus1 Root port Pci Bus Number
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@param[in] Device1 Root port Pci Device Number
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@param[in] Function1 Root port Pci Function Number
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@param[in] Bus2 Endpoint Pci Bus Number
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@param[in] Device2 Endpoint Pci Device Number
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@exception EFI_UNSUPPORTED Unsupported operation.
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@retval EFI_SUCCESS VC mapping correctly initialized
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**/
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EFI_STATUS
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PcieSetCommonClock (
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IN UINT8 Bus1,
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IN UINT8 Device1,
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IN UINT8 Function1,
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IN UINT8 Bus2,
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IN UINT8 Device2
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);
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/**
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This function enables the CLKREQ# PM on all the end point functions
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@param[in] Bus Pci Bus Number
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@param[in] Device Pci Device Number
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@param[in] RootDevice Rootport Device Number
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@param[in] RootFunction Rootport Function Number
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@retval None
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**/
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VOID
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PcieSetClkreq (
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IN UINT8 EndPointBus,
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IN UINT8 EndPointDevice,
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IN UINT8 RootDevice,
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IN UINT8 RootFunction
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);
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/**
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This function get or set the Max Payload Size on all the end point functions
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@param[in] EndPointBus The Bus Number of the Endpoint
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@param[in] EndPointDevice The Device Number of the Endpoint
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@param[in] MaxPayload The Max Payolad Size of the root port
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@param[in] Operation True: Set the Max Payload Size on all the end point functions
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False: Get the Max Payload Size on all the end point functions
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@retval EFI_SUCCESS Successfully completed.
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**/
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EFI_STATUS
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PcieMaxPayloadSize (
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IN UINT8 EndPointBus,
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IN UINT8 EndPointDevice,
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IN OUT UINT16 *MaxPayload,
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IN BOOLEAN Operation
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);
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/**
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This function disable the forwarding of EOI messages unless it discovers
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an IOAPIC behind this root port.
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@param[in] RootBus The Bus Number of the root port
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@param[in] RootDevice The Device Number of the root port
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@param[in] RootFunction The Function Number of the root port
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@param[in] EndPointBus The Bus Number of the Endpoint
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@param[in] EndPointDevice The Device Number of the Endpoint
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@exception EFI_UNSUPPORTED Unsupported operation.
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@retval EFI_SUCCESS Successfully completed.
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**/
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EFI_STATUS
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PcieSetEoiFwdDisable (
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IN UINT8 RootBus,
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IN UINT8 RootDevice,
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IN UINT8 RootFunction,
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IN UINT8 EndPointBus,
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IN UINT8 EndPointDevice
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);
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/**
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Initializes the root port and its down stream devices
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@param[in] RootPortBus Pci Bus Number of the root port
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@param[in] RootPortDevice Pci Device Number of the root port
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@param[in] RootPortFunc Pci Function Number of the root port
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@param[in] TempBusNumberMin Minimal temp bus number that can be assigned to the root port (as secondary
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bus number) and its down stream switches
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@param[in] TempBusNumberMax Maximal temp bus number that can be assigned to the root port (as subordinate
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bus number) and its down stream switches
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@param[in] EnableCpm Enables Clock Power Management; even if disabled, CLKREQ# can still be used by L1 PM substates mechanism
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@retval EFI_SUCCESS Successfully completed
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@retval EFI_NOT_FOUND Can not find device.
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**/
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EFI_STATUS
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PchPcieInitRootPortDownstreamDevices (
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IN UINT8 RootPortBus,
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IN UINT8 RootPortDevice,
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IN UINT8 RootPortFunc,
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IN UINT8 TempBusNumberMin,
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IN UINT8 TempBusNumberMax,
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IN BOOLEAN EnableCpm
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);
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/**
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Get current PCIe link speed.
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@param[in] RpBase Root Port base address
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@return Link speed
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**/
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UINT32
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GetLinkSpeed (
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UINTN RpBase
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);
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/**
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Get max PCIe link speed supported by the root port.
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@param[in] RpBase Root Port base address
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@return Max link speed
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**/
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UINT32
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GetMaxLinkSpeed (
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UINTN RpBase
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);
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/**
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Get Pch Maximum Pcie Controller Number
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@retval Pch Maximum Pcie Controller Number
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**/
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UINT8
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EFIAPI
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GetPchMaxPcieControllerNum (
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VOID
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);
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/**
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PCIe controller configuration.
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**/
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typedef enum {
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Pcie4x1 = 0,
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Pcie1x2_2x1 = 1,
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Pcie2x2 = 2,
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Pcie1x4 = 3
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} PCIE_CONTROLLER_CONFIG;
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/**
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Returns the PCIe controller configuration (4x1, 1x2-2x1, 2x2, 1x4)
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@param[in] ControllerIndex Number of PCIe controller (0 based)
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@retval PCIe controller configuration
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**/
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PCIE_CONTROLLER_CONFIG
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GetPcieControllerConfig (
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IN UINT32 ControllerIndex
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);
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#endif // _PEI_DXE_SMM_PCH_PCI_EXPRESS_HELPERS_LIB_H_
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