/** @file
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Serial IRQ policy
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _SERIAL_IRQ_CONFIG_H_
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#define _SERIAL_IRQ_CONFIG_H_
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#define SERIAL_IRQ_CONFIG_REVISION 1
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extern EFI_GUID gSerialIrqConfigGuid;
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#pragma pack (push,1)
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typedef enum {
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PchQuietMode,
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PchContinuousMode
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} PCH_SIRQ_MODE;
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///
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/// Refer to PCH EDS for the details of Start Frame Pulse Width in Continuous and Quiet mode
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///
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typedef enum {
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PchSfpw4Clk,
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PchSfpw6Clk,
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PchSfpw8Clk
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} PCH_START_FRAME_PULSE;
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///
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/// The PCH_LPC_SIRQ_CONFIG block describes the expected configuration of the PCH for Serial IRQ.
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///
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Config Block Header
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UINT32 SirqEnable : 1; ///< Determines if enable Serial IRQ. 0: Disable; <b>1: Enable</b>.
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UINT32 SirqMode : 2; ///< Serial IRQ Mode Select. Refer to PCH_SIRQ_MODE for each value. <b>0: quiet mode</b> 1: continuous mode.
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UINT32 StartFramePulse : 3; ///< Start Frame Pulse Width. Refer to PCH_START_FRAME_PULSE for each value. Default is <b>PchSfpw4Clk</b>.
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UINT32 RsvdBits0 : 26; ///< Reserved bits
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} PCH_LPC_SIRQ_CONFIG;
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#pragma pack (pop)
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#endif // _SERIAL_IRQ_CONFIG_H_
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