/**@file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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External(\_SB.PCI0.LPCB.H_EC.XDAT, MethodObj)
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Scope(\_SB.PCI0)
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{
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Device(XDCI)
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{
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Name (_ADR, 0x00140001) // _ADR: Address
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OperationRegion (OTGD, PCI_Config, 0x0, 0x100)
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Field (OTGD, DWordAcc, NoLock, Preserve)
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{
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Offset(0x0),
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DVID, 16,
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Offset(0x10),
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XDCB, 64
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}
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//
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// Byte access for PMCS field to avoid race condition on device D-state
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//
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Field (OTGD, ByteAcc, NoLock, Preserve)
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{
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Offset(R_PCH_XDCI_PMCSR), // 0x84, PM_CS - Power Management Control/Status
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D0I3, 2, // PM_CS[1:0] PowerState
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, 6,
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PMEE, 1, // bit 8, PME Enable
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, 6,
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PMES, 1 // bit 15, PME Status
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}
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Method(XDBA, 0)
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{
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Return(And(^XDCB, 0xFFFFFFFFFFFFFF00))
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}
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//
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// Arg0: UUID = {732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511}
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// Arg1: Revision ID = 1
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// Arg2: Function Index
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// Arg3: Argument
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//
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Method(_DSM,4,Serialized)
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{
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If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }
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If(LEqual(Arg0, ToUUID("732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"))){
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If(Lequal(Arg1, 1)){
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//
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// Set PMU Power State
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// Arg0: 0x00 PMU should enter the D0 power state.
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// 0x03 PMU should enter the D3 power state.
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// Arg1: 0x03 Enable PMU PME
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// 0x00 Clear PMU PME
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//
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Method (SPPS,2,Serialized) {
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OperationRegion(XDBW, SystemMemory, XDBA(), 0x110000)
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Field(XDBW, WordAcc, NoLock, Preserve)
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{
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Offset(R_PCH_XDCI_APBFC_U3PMU_CFG2), // 0x10F810
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, 8,
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U2CP, 2, // USB2 core power state
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U3CP, 2, // USB3 core power state
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Offset(R_PCH_XDCI_APBFC_U3PMU_CFG4), // 0x10F818
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PUPS, 2, // PMU power state
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, 1,
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PURC, 1, // Reset PMU core
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, 12,
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Offset(R_PCH_XDCI_APBFC_U3PMU_CFG5), // 0x10F81C
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, 3,
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UXPE, 2, // U2 PME EN / U3 PME EN
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, 11,
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}
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// Local 1 is power state D0 or D3
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Store(Arg0, Local1)
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// Local 2 is Enable/Clear PMU PME
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Store(Arg1, Local2)
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If(LEqual(Local1, 0)){
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// Clear PMU PME
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// 0x10F81C BIT3: USB3 PME
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// 0x10F81C BIT4: USB2 PME
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Store(0, UXPE)
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// Wait for at least 100us, currently configured to 1000us
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Store(0, Local0)
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While(LLess(Local0, 10)){
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Stall(100)
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Increment(Local0)
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}
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// Set PMU to D0 by writing 0 to 0x10f818 Bit 1:0
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Store(0, PUPS)
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// Wait 200ms for PMU to enter D0
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// Confirm PMU being in D0 by checking 0x10f810 Bit 11:8 to be clear
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// 0x10f810 Bit 11:10 - Current power state of USB3 core
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// 0x10f810 Bit 9:8 - Current power state of USB2 core
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// both should be clear
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Store(0,Local0)
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While(LLess(Local0,2000)){
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Stall(100)
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If(LAnd(LEqual(U2CP,0),LEqual(U3CP,0))){
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break
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}
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Increment(Local0)
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}
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If(LNotEqual(U2CP, 0)){
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// Show warning message
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}
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If(LNotEqual(U3CP, 0)){
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// Show warning message
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}
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Return(0)
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}
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If(LEqual(Local1, 3)){
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// PMU should be in D0 at this point
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// 0x10f810 Bit 11:10 - current power state of USB3 core
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// 0x10f810 Bit 9:8 - current power state of USB2 core
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// both should be clear
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If(LNotEqual(U2CP, 0)){
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// Show warning message
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}
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If(LNotEqual(U3CP, 0)){
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// Show warning message
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}
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// Set PMU to D3 by writing 3 to 0x10f818 bit 1:0
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Store(3, PUPS)
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// Wait 200ms for PMU to enter D3
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// Confirm PMU being in D3 by checking 0x10f810 Bit 11:8 to be set
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// 0x10f810 Bit 11:10 - Current power state of USB3 core
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// 0x10f810 Bit 9:8 - Current power state of USB2 core
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// both should be set
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Store(0,Local0)
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While(LLess(Local0,2000)){
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Stall(100)
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If(LAnd(LEqual(U2CP,3),LEqual(U3CP,3))){
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break
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}
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Increment(Local0)
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}
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If(LNotEqual(U2CP, 3)){
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// Show warning message
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}
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If(LNotEqual(U3CP, 3)){
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// Show warning message
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}
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// Set/Clear PMU PME
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// 0x10F81C BIT3: USB3 PME
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// 0x10F81C BIT4: USB2 PME
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Store(Local2, UXPE)
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Return(0)
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}
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Return(0)
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}
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Switch(ToInteger(Arg2)) {
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Case(0){
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// Function 0: return Bit map to indicate Function 0,1,4,5,6,7 supported
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Return(Buffer(){0xF3})
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}
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Case(1){
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// Function 1: Attach/Detach and Port Detection Properties Method
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// This method is called by the USB function stack to set the power state of the PMU.
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// Bit 0 as 1: to indicate Platform support for Attach/detach notify
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// Bit 1 as 0:HW based charging indication
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Return(0x1)
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}
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Case(4){
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// Function 4: Set PMU Power State Method, clear PMU PME
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// Arg3: A package consisting of 1 ULONG value
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// 0x00 PMU should enter the D0 power state.
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// 0x03 PMU should enter the D3 power state.
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// Local 1 is power state D0 or D3
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Store(DerefOf(Index(Arg3,0)), Local1)
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// Set PMU to Dx state and clear PMU PME
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SPPS(Local1, 0)
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}
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Case(5){
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// Function 5: Attach Notification Enabled Method
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// This method is called by the USB function stack to indicate that it has enabled ACPI attach detach notifications.
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// In response the platform may issue an notification indicating the current attach/detach state of the controller.
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// If device is attached, notify XDCI with 0x80
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// If device is detached, notify XDCI with 0x81
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If(CondRefOf(\_SB.PCI0.LPCB.H_EC.XDAT)){
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If(LEqual(\_SB.PCI0.LPCB.H_EC.XDAT(), 1)){
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Notify(\_SB.PCI0.XDCI,0x80)
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}Else{
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Notify(\_SB.PCI0.XDCI,0x81)
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}
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}
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Return(0)
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}
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Case(6){
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// Function 6: XDCI Soft Reset Workaround
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// Return value indicate to OS softreset should be done by OS or not
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// Return value == 1: OS does softreset
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// Return value == 0: platform does softreset
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OperationRegion(XDBD, SystemMemory, XDBA(), 0x110000)
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Field(XDBD, DwordAcc, NoLock, Preserve)
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{
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Offset(0xC704),
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, 30,
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CSFR, 1,
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, 1,
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}
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OperationRegion(XDW2, SystemMemory, XDBA(), 0x110000)
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Field(XDW2, WordAcc, NoLock, Preserve)
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{
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Offset(R_PCH_XDCI_APBFC_U3PMU_CFG6), // 0x10F820
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, 13,
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OTHC, 1, // OTG switched to host complete
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}
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If(LEqual(OTHC, 0)){
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Store(1, CSFR)
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// timeout is 100ms
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Store(0, Local0)
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While(LLess(Local0, 100)){
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If(LEqual(CSFR, 0)){
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Break
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}
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Sleep(1)
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}
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}
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Return(0)
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}
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Case(7){
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// Function 7: Get PMU Power State Method
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// Return:
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// 0: PMU is in D0 state
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// 3: PMU is in D3 state
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OperationRegion(XD22, SystemMemory, XDBA(), 0x110000)
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Field(XD22, WordAcc, NoLock, Preserve)
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{
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Offset(R_PCH_XDCI_APBFC_U3PMU_CFG4), // 0x10F818
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P2PS, 2, // PMU power state
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, 14,
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}
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Store(P2PS, Local0)
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Return(Local0)
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}
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}
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}
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}
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Return(Buffer() {0})
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}
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Name (_DDN, "SPT XHCI controller") // _DDN: DOS Device Name
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Name (_STR, Unicode ("SPT XHCI controller")) // _STR: Description String
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Method(_S0W, 0)
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{ // PMEs can be generated from D3(hot)
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Return(3)
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}
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Method (_STA, 0x0, NotSerialized)
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{
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If(LNotEqual(DVID, 0xFFFFFFFF)) { // device not disabled
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Return (0xF)
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} Else{
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Return (0x0)
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}
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}
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// XDCI Wake Support
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Method(_PRW, 0)
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{
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Return(GPRW(0x6D,4)) // can wakeup from S4 state
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}
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Method(_DSW, 3)
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{
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Store(Arg0, PMEE)
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}
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Method(GPEH, 0, NotSerialized)
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{
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If(LEqual(DVID,0xFFFF)){
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Return()
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}
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Store(PMES, Local0)
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Store(1, PMES) // Clear PME Status
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If(LAnd(PMEE, Local0)){
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Notify(XDCI, 0x02)
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}
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}
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}
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}
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