/**@file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#define SERIAL_IO_PMECTRLSTATUS 0x84
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#define SERIAL_IO_DISABLED 0
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#define SERIAL_IO_ACPI 1
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#define SERIAL_IO_PCI 2
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#define SERIAL_IO_ACPIHIDDEN 3
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#define SERIAL_IO_LEGACY_UART 4
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#define KBL_GENERATION 2
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#define SERIAL_IO_SPT_LP_GPIO_HID "INT344B"
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#define SERIAL_IO_SPT_H_GPIO_HID "INT345D"
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#define SERIAL_IO_KBL_H_GPIO_HID "INT3451"
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#define SERIAL_IO_I2C0_HID "INT3442"
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#define SERIAL_IO_I2C1_HID "INT3443"
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#define SERIAL_IO_I2C2_HID "INT3444"
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#define SERIAL_IO_I2C3_HID "INT3445"
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#define SERIAL_IO_I2C4_HID "INT3446"
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#define SERIAL_IO_I2C5_HID "INT3447"
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#define SERIAL_IO_SPI0_HID "INT3440"
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#define SERIAL_IO_SPI1_HID "INT3441"
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#define SERIAL_IO_UART0_HID "INT3448"
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#define SERIAL_IO_UART1_HID "INT3449"
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#define SERIAL_IO_UART2_HID "INT344A"
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#define SERIAL_IO_I2C0_ADR 0x00150000
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#define SERIAL_IO_I2C1_ADR 0x00150001
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#define SERIAL_IO_I2C2_ADR 0x00150002
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#define SERIAL_IO_I2C3_ADR 0x00150003
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#define SERIAL_IO_I2C4_ADR 0x00190002
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#define SERIAL_IO_I2C5_ADR 0x00190001
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#define SERIAL_IO_SPI0_ADR 0x001E0002
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#define SERIAL_IO_SPI1_ADR 0x001E0003
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#define SERIAL_IO_UART0_ADR 0x001E0000
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#define SERIAL_IO_UART1_ADR 0x001E0001
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#define SERIAL_IO_UART2_ADR 0x00190000
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Scope(\_SB.PCI0) {
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//
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// Common code for D3 entry for all SerialIo devices including PCI mode
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//
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// @param[in] Arg0 PCI calculated address or ACPI BAR1 address of device to be put in D3
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//
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Method (LPD3, 1, Serialized) {
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OperationRegion(ICB1, SystemMemory, Add(Arg0,SERIAL_IO_PMECTRLSTATUS), 4)
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Field(ICB1, DWordAcc, NoLock, Preserve) { PMEC, 32 } //Note: SerialIO Does Not Support PME
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Store(0x3, PMEC) // Set BIT[1:0] = 11b - Power State D3
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Store(PMEC,TEMP) // perform a read to avoid ordering and noncoherency problems
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}
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//
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// Common code for D0 entry for all SerialIo devices including PCI mode
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//
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// @param[in] Arg0 PCI calculated address or ACPI BAR1 address of device to be put in D0
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//
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Method (LPD0, 1, Serialized) {
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OperationRegion(ICB1, SystemMemory, Add(Arg0,SERIAL_IO_PMECTRLSTATUS), 4)
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Field(ICB1, DWordAcc, NoLock, Preserve) { PMEC, 32 } //Note: SerialIO Does Not Support PME
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And(PMEC, 0xFFFF7FFC, PMEC) // Set BIT[1:0] = 00b - Power State D0
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Store(PMEC,TEMP) // perform a read to avoid ordering and noncoherency problems
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}
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//
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// Common code for retrieving hardware revision for all SerialIo devices
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//
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// @param[in] Arg0 BAR1 of device
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//
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// @retval Hardware Revison
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//
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Method (LHRV, 1, Serialized) {
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OperationRegion(ICB1, SystemMemory, Add(Arg0,0x8) , 4)
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Field(ICB1, DWordAcc, NoLock, Preserve) { HRV, 8 }
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Return(HRV)
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}
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//
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// Get D state of SerialIo device - for use in _PSC method
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//
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// @param[in] Arg0 PCI calculated address or ACPI BAR1 of device
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//
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// @retval D State
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//
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Method (GETD, 1, Serialized) {
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OperationRegion(ICB1, SystemMemory, Add(Arg0,SERIAL_IO_PMECTRLSTATUS) , 4)
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Field(ICB1, DWordAcc, NoLock, Preserve) { PMEC, 32 }
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Return (And(PMEC, 0x3))
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}
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//
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// Common code for reporting memory and interrupt resources for all SerialIo devices
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//
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// @param[in] Arg0 Device mode
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// @param[in] Arg1 Memory address
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// @param[in] Arg2 Interrupt number
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//
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// @retval Resource buffer
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//
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Method (LCRS, 3, Serialized) {
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Name (RBUF, ResourceTemplate () {
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Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
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Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , SIRQ) {20}
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})
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CreateDWordField(RBUF,BAR0._BAS,BVAL)
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CreateDWordField(RBUF,BAR0._LEN,BLEN)
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CreateDWordField(RBUF,SIRQ._INT,IRQN)
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Store (Arg1, BVAL)
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Store (Arg2, IRQN)
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If(LEqual(Arg0,4)) {Store(8, BLEN)}
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Return (RBUF)
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}
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//
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// Common code for reporting status of all SerialIo devices
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//
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// @param[in] Arg0 Device's mode
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//
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// @retval 0 (do not show device) or 0xF (device is present)
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//
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Method (LSTA, 1, Serialized) {
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If(LOr(LEqual(Arg0,0),LEqual(Arg0,3))) { Return(0) }
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If(LLess(OSYS,2012)) { Return(0) } // OS older than Win8 = not supported
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Return (0xF)
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}
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//
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// Converts driver-visible GPIO number to interrupt number
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//
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// @param[in] Arg0 BAR1 of device
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//
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// @retval Interrupt number
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//
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Method (GIRQ,1,Serialized) {
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Return (Add(24,Mod(Arg0,96)))
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}
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} // END Scope(\_SB.PCI0)
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Scope(\_SB.PCI0) {
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//
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// An invisible device that claims memory resources reserved for SerialIo devices
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// SerialIo devices in ACPI mode can't claim their BAR1 resources because these are aliases for PciCfg space
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//
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Device(SIRC) {
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Name(_HID,EISAID("PNP0C02"))
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Name(_STA,0x3) // device present and decodes its resources, but not to be displayed in OSPM
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Name(_UID,5)
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//
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// Returns resource buffer with memory ranges used but not explicitely claimed by the device:
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// in ACPI mode (SMDn=1) returns BAR1. In HIDDEN mode (SMDn=3) returns both BARs.
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// In LegacyUART mode(SMDn=4) returns BAR1+ BAR0 except for first 8 bytes
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//
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// @param[in] Arg0 SMDn
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// @param[in] Arg1 SB0n
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// @param[in] Arg2 SB1n
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//
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// @retval Resource buffer with memory ranges
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// if SMDn=0 (SERIAL_IO_DISABLED) or SMDn=2 (SERIAL_IO_PCI) returns an empty buffer
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//
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Method (ADDB, 3, Serialized) {
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Name(BUFF,ResourceTemplate() { Memory32Fixed (ReadWrite, 0, 0x1000, BUF) })
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CreateDWordField(BUFF, BUF._BAS, ADDR)
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CreateDWordField(BUFF, BUF._LEN, LENG)
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Store(ResourceTemplate() { }, Local0) // an empty buffer
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If(LOr(LOr(LEqual(Arg0, SERIAL_IO_ACPI), LEqual(Arg0, SERIAL_IO_ACPIHIDDEN)), LEqual(Arg0, SERIAL_IO_LEGACY_UART))) {
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Store(Arg2, ADDR)
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ConcatenateResTemplate(Local0, BUFF, Local1) // add BAR1
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Store(Local1, Local0)
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}
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If(LEqual(Arg0,SERIAL_IO_ACPIHIDDEN)) {
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Store(Arg1,ADDR)
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ConcatenateResTemplate(Local0, BUFF, Local1) // add BAR0
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Store(Local1, Local0)
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}
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If(LEqual(Arg0, SERIAL_IO_LEGACY_UART)) {
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Store(Add(8, Arg1), ADDR)
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Store(0xFF8, LENG)
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ConcatenateResTemplate(Local0, BUFF, Local1) // add BAR0 without 8 bytes
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Store(Local1, Local0)
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}
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Return (Local0)
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}
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Method (_CRS, 0x0, Serialized) {
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Store(ResourceTemplate() { }, Local0) // placeholder for concatenated buffers
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//
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// SB1[X] if device is configured as ACPI represents BAR1
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// in case of PCI it stands for memory mapped BDF
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//
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ConcatenateResTemplate(Local0, ADDB(SMD0,SB00,SB10), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD1,SB01,SB11), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD2,SB02,SB12), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD3,SB03,SB13), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD4,SB04,SB14), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD5,SB05,SB15), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD6,SB06,SB16), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD7,SB07,SB17), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD8,SB08,SB18), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMD9,SB09,SB19), Local1)
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Store(Local1, Local0)
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ConcatenateResTemplate(Local0, ADDB(SMDA,SB0A,SB1A), Local1)
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Store(Local1, Local0)
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//
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// GPIO device always exists in chipset. If it's not visible in ACPI
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// and doesn't claim its resources, declare it here to prevent OS from reusing its mem addresses
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//
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If(LEqual(\_SB.PCI0.GPI0._STA(),0)) {
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ConcatenateResTemplate(Local0, \_SB.PCI0.GPI0._CRS(), Local1)
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Store(Local1, Local0)
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}
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Return (Local0)
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} // END _CRS
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} // END Device(SIRC)
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//----------------------------
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// Serial IO GPIO Controller
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//----------------------------
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Device (GPI0)
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{
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Method (_HID) {
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// Return HID based on PCH Product
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If (LEqual(PCHV, SPTH)) {
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If (LEqual(PCHG, KBL_GENERATION)) { Return(SERIAL_IO_KBL_H_GPIO_HID) }
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Return(SERIAL_IO_SPT_H_GPIO_HID)
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}
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Return(SERIAL_IO_SPT_LP_GPIO_HID)
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}
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Name (LINK,"\\_SB.PCI0.GPI0")
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Method (_CRS, 0x0, NotSerialized) {
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Name (RBUF, ResourceTemplate () {
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Memory32Fixed (ReadWrite, 0x00000000, 0x00010000, BAR0)
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Memory32Fixed (ReadWrite, 0x00000000, 0x00010000, BAR1)
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Memory32Fixed (ReadWrite, 0x00000000, 0x00010000, BAR3)
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Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , IRQ) { 14 } //Interrupt IRQ_EN
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})
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CreateDWordField(RBUF,BAR0._BAS,COM0)
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CreateDWordField(RBUF,BAR1._BAS,COM1)
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CreateDWordField(RBUF,IRQ._INT,IRQN)
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Store( Add(SBRG,PCH_GPIO_COM0), COM0)
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Store( Add(SBRG,PCH_GPIO_COM1), COM1)
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CreateDWordField(RBUF,BAR3._BAS,COM3)
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Store( Add(SBRG,PCH_GPIO_COM3), COM3)
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Store(SGIR,IRQN)
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Return (RBUF)
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}
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Method (_STA, 0x0, NotSerialized) {
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If(LEqual(SBRG, 0)) { Return(0x0) } // has BAR for this device been programmed by the OS?
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If(LEqual(GPEN, 0)) { Return(0x0) } // GPIO disabled in platform policy
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Return(0xF)
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}
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}
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} // END Scope(\_SB.PCI0)
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//------------------------------------------
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// Serial IO I2C Controller 0 Configuration
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//------------------------------------------
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Scope(\_SB.PCI0) {
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Device (I2C0) {
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Name (LINK,"\\_SB.PCI0.I2C0") // Support for Windows 7
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//
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// I2C0 PCI/ACPI PS0 PS3 and PSC
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//
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Method (_PSC) {
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Return (GETD(SB10))
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}
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Method (_PS0) {
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LPD0(SB10)
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}
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Method (_PS3) {
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LPD3(SB10)
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}
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//
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// Apllies for I2C0 all modes except PCI
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//
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If(LNotEqual(SMD0,SERIAL_IO_PCI)) {
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Name (_HID, SERIAL_IO_I2C0_HID)
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Method (_HRV) { Return (LHRV(SB10)) }
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Method (_CRS) { Return (LCRS(SMD0,SB00,SIR0)) }
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Method (_STA) { Return (LSTA(SMD0)) }
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}
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//
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// Apllies for I2C0 PCI mode only
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//
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If(LEqual(SMD0,SERIAL_IO_PCI)) {
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Name (_ADR, SERIAL_IO_I2C0_ADR)
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Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
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}
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} // Device (I2C0)
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} // Scope(\_SB.PCI0)
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//------------------------------------------
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// Serial IO I2C Controller 1 Configuration
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//------------------------------------------
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Scope(\_SB.PCI0) {
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Device (I2C1) {
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Name (LINK,"\\_SB.PCI0.I2C1") // Support for Windows 7
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//
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// I2C1 PCI/ACPI PS0 PS3 and PSC
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//
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Method (_PSC) {
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Return (GETD(SB11))
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}
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Method (_PS0) {
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LPD0(SB11)
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}
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Method (_PS3) {
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LPD3(SB11)
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}
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//
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// Apllies for I2C1 all modes except PCI
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//
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If(LNotEqual(SMD1,SERIAL_IO_PCI)) {
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Name (_HID, SERIAL_IO_I2C1_HID)
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Method (_HRV) { Return (LHRV(SB11)) }
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Method (_CRS) { Return (LCRS(SMD1,SB01,SIR1)) }
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Method (_STA) { Return (LSTA(SMD1)) }
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}
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//
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// Apllies for I2C1 PCI mode only
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//
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If(LEqual(SMD1,SERIAL_IO_PCI)) {
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Name (_ADR, SERIAL_IO_I2C1_ADR)
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Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
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}
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} // Device (I2C1)
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} // Scope(\_SB.PCI0)
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//------------------------------------------
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// Serial IO I2C Controller 2 Configuration
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//------------------------------------------
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Scope(\_SB.PCI0) {
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Device (I2C2) {
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Name (LINK,"\\_SB.PCI0.I2C2") // Support for Windows 7
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//
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// I2C2 PCI/ACPI PS0 PS3 and PSC
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//
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Method (_PSC) {
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Return (GETD(SB12))
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}
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Method (_PS0) {
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LPD0(SB12)
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}
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Method (_PS3) {
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LPD3(SB12)
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}
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//
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// Apllies for I2C2 all modes except PCI
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//
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If(LNotEqual(SMD2,SERIAL_IO_PCI)) {
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Name (_HID, SERIAL_IO_I2C2_HID)
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Method (_HRV) { Return (LHRV(SB12)) }
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Method (_CRS) { Return (LCRS(SMD2,SB02,SIR2)) }
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Method (_STA) { Return (LSTA(SMD2)) }
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}
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//
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// Apllies for I2C2 PCI mode only
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//
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If(LEqual(SMD2,SERIAL_IO_PCI)) {
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Name (_ADR, SERIAL_IO_I2C2_ADR)
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Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
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}
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} // Device (I2C2)
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} // Scope(\_SB.PCI0)
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//------------------------------------------
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// Serial IO I2C Controller 3 Configuration
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//------------------------------------------
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Scope(\_SB.PCI0) {
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Device (I2C3) {
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Name (LINK,"\\_SB.PCI0.I2C3") // Windows 7 W/A
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//
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// I2C3 PCI/ACPI PS0 PS3 and PSC
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//
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Method (_PSC) {
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Return (GETD(SB13))
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}
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Method (_PS0) {
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LPD0(SB13)
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}
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Method (_PS3) {
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LPD3(SB13)
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}
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//
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// Apllies for I2C3 all modes except PCI
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//
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If(LNotEqual(SMD3,SERIAL_IO_PCI)) {
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Name (_HID, SERIAL_IO_I2C3_HID)
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Method (_HRV) { Return (LHRV(SB13)) }
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Method (_CRS) { Return (LCRS(SMD3,SB03,SIR3)) }
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Method (_STA) { Return (LSTA(SMD3)) }
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}
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//
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// Apllies for I2C3 PCI mode only
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//
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If(LEqual(SMD3,SERIAL_IO_PCI)) {
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Name (_ADR, SERIAL_IO_I2C3_ADR)
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Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
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}
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} // Device (I2C3)
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} // Scope(\_SB.PCI0)
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//------------------------------------------
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// Serial IO I2C Controller 4 Configuration
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//------------------------------------------
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Scope(\_SB.PCI0) {
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Device (I2C4) {
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Name (LINK,"\\_SB.PCI0.I2C4") // Support for Windows 7
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//
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// I2C4 PCI/ACPI PS0 PS3 and PSC
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//
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Method (_PSC) {
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Return (GETD(SB14))
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}
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Method (_PS0) {
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LPD0(SB14)
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}
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Method (_PS3) {
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LPD3(SB14)
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}
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//
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// Apllies for I2C4 all modes except PCI
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//
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If(LNotEqual(SMD4,SERIAL_IO_PCI)) {
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Name (_HID, SERIAL_IO_I2C4_HID)
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Method (_HRV) { Return (LHRV(SB14)) }
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Method (_CRS) { Return (LCRS(SMD4,SB04,SIR4)) }
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Method (_STA) { Return (LSTA(SMD4)) }
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}
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//
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// Apllies for I2C4 PCI mode only
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//
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If(LEqual(SMD4,SERIAL_IO_PCI)) {
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Name (_ADR, SERIAL_IO_I2C4_ADR)
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Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
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}
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} // Device (I2C4)
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} // Scope(\_SB.PCI0)
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//------------------------------------------
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// Serial IO I2C Controller 5 Configuration
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//------------------------------------------
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Scope(\_SB.PCI0) {
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Device (I2C5) {
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Name (LINK,"\\_SB.PCI0.I2C5") // Support for Windows 7
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//
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// I2C5 PCI/ACPI PS0 PS3 and PSC
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//
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Method (_PSC) {
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Return (GETD(SB15))
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}
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Method (_PS0) {
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LPD0(SB15)
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}
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Method (_PS3) {
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LPD3(SB15)
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}
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//
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// Apllies for I2C5 all modes except PCI
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//
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If(LNotEqual(SMD5,SERIAL_IO_PCI)) {
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Name (_HID, SERIAL_IO_I2C5_HID)
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Method (_HRV) { Return (LHRV(SB15)) }
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Method (_CRS) { Return (LCRS(SMD5,SB05,SIR5)) }
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Method (_STA) { Return (LSTA(SMD5)) }
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}
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//
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// Apllies for I2C5 PCI mode only
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//
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If(LEqual(SMD5,SERIAL_IO_PCI)) {
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Name (_ADR, SERIAL_IO_I2C5_ADR)
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Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
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}
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} // Device (I2C5)
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} // Scope(\_SB.PCI0)
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//-------------------------------------------
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// Serial IO SPI Controller 0 Configuration
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//-------------------------------------------
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Scope(\_SB.PCI0) {
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Device (SPI0) {
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//
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// SPI0 PCI/ACPI PS0 PS3 and PSC
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//
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Method (_PSC) {
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Return (GETD(SB16))
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}
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Method (_PS0) {
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LPD0(SB16)
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}
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Method (_PS3) {
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LPD3(SB16)
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}
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//
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// Apllies for SPI0 all modes except PCI
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//
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If(LNotEqual(SMD6,SERIAL_IO_PCI)) {
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Name (_HID, SERIAL_IO_SPI0_HID)
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Method (_HRV) { Return (LHRV(SB16)) }
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Method (_CRS) { Return (LCRS(SMD6,SB06,SIR6)) }
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Method (_STA) { Return (LSTA(SMD6)) }
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}
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|
//
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// Apllies for SPI0 PCI mode only
|
//
|
If(LEqual(SMD6,SERIAL_IO_PCI)) {
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Name (_ADR, SERIAL_IO_SPI0_ADR)
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Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
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}
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} // Device (SPI0)
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} // Scope(\_SB.PCI0)
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//------------------------------------------
|
// Serial IO SPI Controller 1 Configuration
|
//------------------------------------------
|
Scope(\_SB.PCI0) {
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Device (SPI1) {
|
//
|
// SPI1 PCI/ACPI PS0 PS3 and PSC
|
//
|
Method (_PSC) {
|
Return (GETD (SB17))
|
}
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Method (_PS0) {
|
LPD0(SB17)
|
}
|
Method (_PS3) {
|
LPD3(SB17)
|
}
|
|
//
|
// Apllies for SPI0 all modes except PCI
|
//
|
If(LNotEqual(SMD7,SERIAL_IO_PCI)) {
|
Name (_HID, SERIAL_IO_SPI1_HID)
|
Method (_HRV) { Return (LHRV(SB17)) }
|
Method (_CRS) { Return (LCRS(SMD7,SB07,SIR7)) }
|
Method (_STA) { Return (LSTA(SMD7)) }
|
}
|
|
//
|
// Apllies for SPI1 PCI mode only
|
//
|
If(LEqual(SMD7,SERIAL_IO_PCI)) {
|
Name (_ADR, SERIAL_IO_SPI1_ADR)
|
Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
|
}
|
|
} // Device (SPI1)
|
} // Scope(\_SB.PCI0)
|
|
//-------------------------------------------
|
// Serial IO UART Controller 0 Configuration
|
//-------------------------------------------
|
Scope(\_SB.PCI0) {
|
Device (UA00) {
|
|
//
|
// Apllies for UART0 all modes except PCI
|
//
|
If(LNotEqual(SMD8,SERIAL_IO_PCI)) {
|
Method(_HID) {
|
If(LEqual(SMD8,SERIAL_IO_LEGACY_UART)) { Return (EISAID("PNP0C02")) }
|
Else { Return (SERIAL_IO_UART0_HID) }
|
}
|
Name (_UID, "SerialIoUart0")
|
Name (_DDN, "SerialIoUart0")
|
Method (_HRV) { Return (LHRV(SB18)) }
|
Method (_CRS) { Return (LCRS(SMD8,SB08,SIR8)) }
|
Method (_STA) { Return (LSTA(SMD8)) }
|
}
|
|
//
|
// Apllies for UART0 PCI mode only
|
//
|
If(LEqual(SMD8,SERIAL_IO_PCI)) {
|
Name (_ADR, SERIAL_IO_UART0_ADR)
|
Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
|
}
|
|
//
|
// UART0 PCI/ACPI PS0 PS3 and PSC
|
//
|
If(LNotEqual(SMD8,SERIAL_IO_LEGACY_UART)) {
|
Method (_PSC) {
|
Return (GETD (SB18))
|
}
|
Method (_PS0) {
|
LPD0(SB18)
|
}
|
Method (_PS3) {
|
LPD3(SB18)
|
}
|
}
|
|
} // Device (UA00)
|
} // Scope(\_SB.PCI0)
|
|
//-------------------------------------------
|
// Serial IO UART Controller 1 Configuration
|
//-------------------------------------------
|
Scope(\_SB.PCI0) {
|
Device (UA01) {
|
|
//
|
// Apllies for UART1 all modes except PCI
|
//
|
If(LNotEqual(SMD9,SERIAL_IO_PCI)) {
|
Method(_HID) {
|
If(LEqual(SMD9,SERIAL_IO_LEGACY_UART)) { Return (EISAID("PNP0C02")) }
|
Else { Return (SERIAL_IO_UART1_HID) }
|
}
|
Name (_UID, "SerialIoUart1")
|
Name (_DDN, "SerialIoUart1")
|
Method (_HRV) { Return (LHRV(SB19)) }
|
Method (_CRS) { Return (LCRS(SMD9,SB09,SIR9)) }
|
Method (_STA) { Return (LSTA(SMD9)) }
|
}
|
|
//
|
// Apllies for UART1 PCI mode only
|
//
|
If(LEqual(SMD9,SERIAL_IO_PCI)) {
|
Name (_ADR, SERIAL_IO_UART1_ADR)
|
Method (_DSM,4,Serialized){If(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
|
}
|
|
//
|
// UART1 PCI/ACPI PS0 PS3 and PSC
|
//
|
If(LNotEqual(SMD9,SERIAL_IO_LEGACY_UART)) {
|
Method (_PSC) {
|
Return (GETD (SB19))
|
}
|
Method (_PS0) {
|
LPD0(SB19)
|
}
|
Method (_PS3) {
|
LPD3(SB19)
|
}
|
}
|
|
} // Device (UA01)
|
} // Scope(\_SB.PCI0)
|
|
//-------------------------------------------
|
// Serial IO UART Controller 2 Configuration
|
//-------------------------------------------
|
Scope(\_SB.PCI0) {
|
Device (UA02) {
|
|
//
|
// Apllies for UART2 all modes except PCI
|
//
|
If(LNotEqual(SMDA,SERIAL_IO_PCI)) {
|
Method (_HID) {
|
If(LEqual(SMDA,SERIAL_IO_LEGACY_UART)) { Return (EISAID("PNP0C02")) }
|
Else { Return (SERIAL_IO_UART2_HID) }
|
}
|
Name (_UID, "SerialIoUart2")
|
Name (_DDN, "SerialIoUart2")
|
Method (_HRV) { Return (LHRV(SB1A)) }
|
Method (_CRS) { Return (LCRS(SMDA,SB0A,SIRA)) }
|
Method (_STA) { Return (LSTA(SMDA)) }
|
}
|
|
//
|
// Apllies for UART2 PCI mode only
|
//
|
If(LEqual(SMDA,SERIAL_IO_PCI)) {
|
Name (_ADR, SERIAL_IO_UART2_ADR)
|
Method (_DSM,4,Serialized){if(PCIC(Arg0)) { Return(PCID(Arg0,Arg1,Arg2,Arg3)) }; Return(Buffer() {0})}
|
}
|
|
//
|
// UART2 PCI/ACPI PS0 PS3 and PSC excluding Legacy Uart
|
//
|
If(LNotEqual(SMDA,SERIAL_IO_LEGACY_UART)) {
|
Method (_PSC) {
|
Return (GETD(SB1A))
|
}
|
Method (_PS0) {
|
LPD0(SB1A)
|
}
|
Method (_PS3) {
|
LPD3(SB1A)
|
}
|
}
|
|
} // Device (UA02)
|
} // Scope(\_SB.PCI0)
|
|
